STLD20D
White LED power supply
General features
Typical guaranteed efficiency: 80% Drives up to 4 LEDs in series from a 2.8V up to 4.2V supply voltage Constant current regulation over the whole operating voltage range PWM control mode Integrated load disconnect switch that opens the LEDs path in shutdown mode Integrated soft start peak inductor current Programmable peak inductor current (STLD20D-C8 only) Shutdown pin allows digital dimming control up to 10kHz Over voltage and over temperature protection with automatic restart Low shutdown current (< 1A) Small external inductor (10H) Tiny external ceramic capacitor (1F)
QFN 3x3 8L SOT23-8L
Description
The STLD20D is a constant switching frequency boost regulator mainly dedicated to supply up to 4 white LEDs connected in series. A constant LED current is achieved by sensing the LED current through a sensing resistor RLED (see Figure 3.). The device also includes a supply voltage rejection circuit that prevents from any possible flickering effect on the display that might happen during input supply voltage variation. An integrated Load Disconnect Switch open the LED path to eliminate the current consumption in shutdown mode. The maximum peak inductor current can be programmed (STLD20D-C8 only).
Appl ication
White Led supply for LCD backlight Mobile phone PDA and organizers, MP3 players, Toys
Order code
Part number STLD20D-C8 STLD20D-DEF October 2006 Package SOT23-8L QFN 3x3 8L Rev 4 Marking L2D L2D Packing Tape and reel Tape and reel 1/31
www.st.com
31
Contents
STLD20D
Contents
1 2 3 4 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5. 1 5.2 5.3 5. 4 5. 5 5. 6 5.7 5. 8 Boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Peak inductor current limitation and soft start function . . . . . . . . . . . . . . . . 9 Peak inductor current programmability (STLD20D-C8 only) . . . . . . . . . . . 9 Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Brightness control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Over temperature protection (OTP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Over voltage protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 7
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Components selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1 L, Boost inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1.1 7.1.2 7.1.3 7.1.4 Calculation of the inductor value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Calculation of the saturation current I(sat) . . . . . . . . . . . . . . . . . . . . . . . 15 Choice of the RSET resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reference selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.2 7.3 7.4 7. 5
CIN and COUT capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 1.3. D, Boost diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.3.1 Electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
RLED feedback resistance selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8
PWM dimming control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/31
STLD20D
Contents
9
Analog dimming control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
9. 1 9. 2 9. 3 Minimum dimming current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Rd1 Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Rdim calculation for dimming mode control . . . . . . . . . . . . . . . . . . . . . . . 22
10 11 12 13
Layout recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3/31
Pin description
STLD20D
1
Figure 1.
Pin description
Pin configuration (top view)
VIN SHDN RSET
VOUT LDS FB
EXPOSED PAD
GND
SW
GND VIN SHDN N/C
SW VOUT LDS FB
1 GND
2 VIN
3
4
5 FB
6 LDS
7 VOUT
8 SW
1 GND
2 VIN
3 SHDN
4 N/C
5 FB
6 LDS
7 VOUT
8 SW
SHDN RSET
4/31
STLD20D
Block diagram
2
Figure 2.
Block diagram
Block diagram
SW
OTP OSCILLATOR RAMP OSCILLATOR COMPENSATION POWER FAULT ENABLE VIN OVP
VOUT
VIN
S
+ PWN COMP.
Q R
SW
SHDN
T VIN
LOAD DISCONNECT
+ DRAIN CURRENT REFERENCE
RSET (*) LDS LDS FB
VIN SHDN
+
LED CURRENT REFERENCE
GND
(*) STLD20D-C8 only
5/31
Block diagram Figure 3. Basic connection
STLD20D
Table 1.
Symbol RLED CIN COUT
External components proposal
Value Parameter LED current resistance Input filtering capacitor Ceramic type Output capacitance Inductance 1 10 1 300 40 1 0.40 0.46 H mA Vdc A V Test conditions Min. Typ. 15 2.2 F Max. Unit
L
Boost inductor (height < 2mm)
Resistance at 500kHz ISAT (RSET = 100k) VRRM
D
Boost diode (STMicroelectronics STPS1L40M type)
IF (peak forward current) VF @ IF = 1A Tj = 25C
Note:
The external components proposal should be considered as a design reference guide.The performances mentioned in the electrical characteristics table are not guaranteed for all the possible electrical parameters of the components included in this list. On the other hand the operation of STLD20D is not limited with the use of components included in this list.
6/31
STLD20D
Maximum ratings
3
Table 2.
Symbol VIN VESD TOP Tstg BVDS SHDN
Maximum ratings
Absolute maximum ratings
Value Parameter Supply voltage range ESD ratings Operating temperature Storage temperature Breakdown voltage at pin SW and TSS and VOUT Maximum voltage applied on SHDN pin HBM MIL STD 883C Test conditions Min. 2.5 2 - 40 - 65 20 VI N + 85 150 Typ. Max. 5 V kV C C V V Unit
Table 3.
Symbol
Thermal data
Value Parameter Min. Typ. Max. 300 C/W QFN 350 SOT23-8L Unit
RthJA
Mounted on epoxy board without copper heatsink
7/31
Electrical characteristics
STLD20D
4
Table 4.
Symbol VIN ILED ISD IQ
Electrical characteristics
Electrical characteristics (VIN = 2.8 to 4.2V and TJ = 25C)
Value Parameter Operating Input voltage range Average regulated current ILED = 20mA Stand-by current Quiescent current consumption SOT23-8L SW Boost switch RDSON QFN RLED = 15 VIN = 4.2V VIN = 4.2V VIN = 2.8V VIN = 4.2V VIN = 2.8V VIN = 4.2V VIN = 2.8V VIN = 4.2V VIN = 2.8V VIN = 4.2V 0.285 0.43 0.48 0.38 0.57 0.42 5.0 4.2 5.1 4.3 0.302 0.315 0.9 VIN = 2.8V VIN = 4.2V 400 80 % 85 500 20 L = 10H RSET = GND (STLD20D-C8) 17.5 18.5 0.7 110 5 V IL VIH 1.2 0.3 V 640 20 600 kHz % mA VDC VDC C C V mA/V Test conditions Min. 2.8 19 20 Typ. Max. 4.2 21 1 0.6 V mA A mA Unit
SHDN = low SHDN = high TJ = 25C ISW = 250mA TJ = 25C ISW = 250mA TJ = 25C ILDS = 20mA TJ = 25C ILDS = 20mA
SOT23-8L LDS Load Disconnect Switch RDSON QFN FB Line Feedback voltage
Variation of the LED current versus the input voltage: RLED = 15 Efficiency with 4 LEDS, VOUT = 16V Switching frequency Minimum duty cycle Peak current boost switch (1) Overvoltage protection Overvoltage hysteresis Over temperature protection Over temperature protection hysteresis Disable Low Shutdown signal logic Enable high
Eff fSW DCMIN ILIM OVP HystOV OTP HystOT SHDN
1. Guaranteed by design.
8/31
STLD20D
Functional description
5
5.1
Functional description
Boost converter
The STLD20D is a PWM mode control boost converter operating at 500kHz. An automatic compensation of the oscillation ramp allows rejection of the battery voltage transient. The LED current regulation (see Figure 3.) is done by sensing the LED current through the resistance RLED. The voltage across RLED is used by the feedback loop of the controller (FB pin).
5.2
Peak inductor current limitation and soft start function
An integrated current sensor limits the switching current at 640 mA maximum. Should the peak drain current exceed 640mA (if RSET = 0 for STLD20D-C8), the flip flop will turn off the switch SW. During start up, this peak drain current limitation acts like a soft start function.
5.3
Peak inductor current programmability (STLD20D-C8 only)
The converter peak current must be always below the inductor saturation current. For flexibility reasons, the maximum peak inductor current can be programmed by connecting a resistor at the pin RSET. The Figure 12. gives the value of the resistance RSET versus the peak inductor current limit ILMAX.
5.4
Shutdown
The SHDN pin is a low logic input signal and allows turning off the controller without cutting the input voltage from the boost regulator circuit. An integrated Load Disconnect Switch LDS disconnects the LEDs branch in shutdown mode.This arrangement allows eliminating the DC current path that normally exists with traditional boost regulator in shutdown mode.
5.5
Brightness control
The brightness of the LED is adjusted by pulsing the shutdown pin with a PWM signal as high as 10kHz. By using such a PWM signal the controller is alternatively ON and OFF and the LED current changes from full current to zero. The duty cycle allows regulating the average LED current. This scheme ensures that when the LEDs are ON, they are driven at the full current without risk of color change.
9/31
Functional description
STLD20D
5.6
Over temperature protection (OTP)
An integrated temperature sensor senses the temperature of the junction of the controller. As soon as this temperature exceeds 110C min fixed internally, the controller is automatically turned OFF. When the temperature is reduced of 5C the operation of the device automatically recovers.
5.7
Over voltage protection (OVP)
In case of failure and if the LED branch is cut, then there is no signal at the feedback pin FB (Figure 3.), the PWM controller will then switches with a maximum duty cycle. This will generate a voltage at the pin SW and VOUT that can exceed the maximum rating of the device. The overvoltage protection block senses the output voltage at the pin VOUT (Figure 3.). If the voltage exceeds 18.5VDC typical the controller is automatically turned OFF. When the voltage is reduced of 0.7V, the operation of the device automatically recovers.
5.8
Efficiency
(Figure 4. & Figure 9.) The efficiency takes into account these following losses:
RLED ohmic losses Boost switch SW losses Load Disconnect Switch LDS Boost inductor losses Boost diode losses
10/31
STLD20D
Typical performance characteristics
6
Typical performance characteristics
Figure 4.
4 LEDs efficiency measurement
Figure 5.
LED current vs input voltage
Efficiency (%)
90.0
Ta = 25C ILED = 20mA, n.VLED= 16V, DC = 100%
ILED(mA)
21.00
Ta = 25C
20.80 20.60
LQH32CN100K33
20.40
LPO04815-103
80.0 Shielded TDK VLF3010AT-100MR49
20.20 20.00 19.80 19.60 19.40 19.20
CRDH2D14-100
70.0 2.5 3.0 3.5 4.0 4.5
19.00 2.5 3 3.5 4 4.5 5
VIN(V)
VIN(V)
Figure 6.
Feedback voltage
Figure 7.
Boost switch resistance (STLD20DC8 )
VFB(mV)
310.0 0.8 0.7 305.0 Ta = 85C 300.0 Ta = 25C Ta = -40C 0.4 295.0 0.3 290.0 2.5 3.0 3.5 4.0 4.5 0.2 0.6 0.5
RDSon()
Ta = 85C Ta = 25C Ta = -40C
2.5
3.0
3.5
4.0
4.5
VIN(V)
VIN(V)
Figure 8.
Boost switch resistance (STLD20D- Figure 9. DE F)
Efficiency vs input voltage (ILED=20mA; TA=25C)
RDSon()
0.8 0.7
Efficiency (%)
88 87 86
0.6 0.5 Ta = 85C Ta = 25C 0.4
85 84 83 82 81
0.3 0.2 2.5 3.0 3.5 4.0
Ta = -40C
80 79
4.5
78 2.5 3 3.5 4 4.5 5
VIN(V)
Input voltage (VDC)
11/31
Typical performance characteristics
STLD20D
Figure 10. Load disconnect switch resistance Figure 11. Quiescent Current consumption
RDSon()
7.0
IQ(A)
500.0 450.0 400.0 Ta = 85C Ta = 25C Ta = -40C
6.0
5.0 Ta = 85C 4.0 Ta = 25C 3.0 Ta = -40C 2.0 2.5 3.0 3.5 4.0 4.5
350.0 300.0 250.0 200.0 2.5 3.0 3.5 4.0 4.5
VIN(V)
VIN(V)
Figure 12. Max peak inductor current IL versus Figure 13. Max peak inductor current IL versus L and RSET RSET
ILIM(mA)
600.0 550.0 RSET = GND 500.0 450.0 400.0 350.0 300.0 250.0 200.0 4.0 8.0 12.0 16.0 20.0 24.0 RSET = 100K
ILIM(mA)
600 550 500 450 400 350 300 250 200 30 40 50 60 70 80 90 100 ILIM = 450 mA RSET = 56 k ILIM = f(RSET) (L = 10H)
L(H)
RSET(k)
Figure 14. ILED versus duty cycle
ILED(mA)
20 18 16 14 12 10 8 6 4 2 0 0 10 20 30 40 50 60 70 80 90 100 Theoretical Real Values 300Hz Real Values 10kHz ILED = F(Duty), Ta= 25C
Figure 15. Typical waveform
VO U T VS W IL E D IL
Duty(%)
12/31
STLD20D Figure 16. Supply voltage rejection
Typical performance characteristics Figure 17. Overvoltage protection
ILED
VIN
VOUT
VS W
IL
13/31
Components selection
STLD20D
7
7.1
Components selection
L, Boost inductor selection
To get a good trade-off thickness/efficiency, an attention must be given on the inductor choice.
The inductance value must be selected to remain in the discontinuous conduction mode. Its saturation current (Isat) must be equal or higher than the programmed current (ILIM). An attention must be taken on the dynamic inductor parameters. Actually, some power losses can occur in the boost inductor when it works at several hundred KHz and can reduce the efficiency.
7.1.1
Calculation of the inductor value
The inductor must be dimensioned so that the STLD20D stays running in discontinuous conduction mode operation in the worst operation condition (VIN = VIN_min= 2.8V). The limit between continuous and discontinuous mode is called critical mode and characterized by an uninterrupted current through the inductor (see figure 18).
Figure 18.
3 different conduction modes
IL
Continuous Discontinuous Critical
t
The formula [1] gives the maximum typical value of the inductor for a discontinuous mode operation in the worst case condition (critical mode). Figure 19 shows the typical L value versus the voltage across the LED branch N.VLED. Note that this curve includes the STLD20D and inductance dispersions (20%).
N.VLED = 4x4V = 16V and ILOAD = 20mA
V in ( m i n ) ( N VL E D Vi n ( m i n ) + V F B + IL E D R L D S ) L t y p ------------------------------------------------------------------------------------------------------------------------------------------------------------- [ 1 ] 2.4 I L E D N VL E D Fm a x ( N V L E D + I L E D R L D S )
2
14/31
STLD20D Where:
Components selection
is the efficiency (80%) N is the number of the white LEDs in series VLED is the forward voltage of the LED for the ILED current (VLED = 4V in our example) VIN(min) is the minimum input voltage (2.8V) VFB is the error amplifier reference (0.3V) RLDS is the internal resistance of the Load Disconnect Switch power MosFET (6) Fmax is the maximum frequency of the STLD20D (600kHz) ILED_MAX is the current through the LED
For example, the case with 4 white LEDs can be considered in order to evaluate L value in the worst case conduction.
Figure 19. Typical inductance value versus the white LED voltage for three IOUT
L typ (H)
2.1E-05 1.9E-05 1.7E-05 1.5E-05 1.3E-05 11H 1.1E-05 9.0E-06 7.0E-06 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Ltyp=f(nVLED) 15mA 20mA 25mA
N.VLED (V)
From figure 19, typical inductance must be lower than 11H. By minimizing the inductance to ensure the discontinuous mode operation, the standard coil value is equal to 10H. Then: L=10H
7.1.2
Calculation of the saturation current I(sat)
The maximum peak current (Ip(max)) during steady state can be estimated by the formula [2]:
2 I L E N VL E ( N V D V N ( m i + V B + I L E D R L D ) -------------------D------------------------------D--------------------------L-E---------------I------------n-)-----------F-----------------------------------------S-- [ 2 ] ----------- Fm i n 0.8 L t y p ( N V L E D + V F B + I L E D R L D S )
Ip ( m a x ) =
Where:
Ltyp is the typical inductance value Fmin is the minimum frequency due to the STLD20D spread-off (400kHz)
15/31
Components selection
STLD20D
Figure 20. Maximum peak current (Ip(max)) versus the white LEDs voltages for 3 outputs current - VIN > 2.8V
IP (max) (A)
0.5
10H
0.45 0.4 0.35 0.3 15mA 0.25 0.2 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 20mA 25mA
N.VLED (V)
Figure 20 shows the maximum peak current Ip(max) through the coil for L=10H versus the voltage across the LED branch, N.VLED and the LED current ILED for VIN > 2.8V. As N.VLED = 16V and ILED = 20mA, then Ip(max) = 0.45A. The curve below ends when the converter reaches the critical mode operation. Therefore, the saturation current (Isat) of the inductor must be higher than 0.45A. To conclude:
Is a t Ip( m ax) I s a t 0.4 A
7.1.3
Choice of the RSET resistor
The resistor RSET fixes the maximum peak current flowing through the inductor whatever the operating conditions. Thus, current saturation (Isat) is never reached. If the height constraint is important, this function allows using low profile inductor with a small saturation current. The Figure 12. on page 12 gives the corresponding typical value of the external resistor RSET versus the ILIM value. This curve is slightly dependent of the temperature and the input voltage. To prevent the coil saturation RSET must be equal to 56k see Figure 12. Thus: ,
Isa t IL I M Ip (m a x)
7.1.4
Reference selection
The table below gives some coil references suitable for the STLD20D versus L, DCR, Isat value and sizing requirements.
16/31
STLD20D
Components selection
Table 5.
Name
Reference selection
Ref LQH32CN4R7M33 LQH32CN100K33 Height (mm) 2 2 1.55 1.55 1.5 1.5 1.65 1.65 1.8 1.855 1.5 1.5 10 L typ (H) 4.7 10 4.7 10 4.7 10 10 15 10 10 6.8 10 10 DCR () 0.15 0.3 0.15 0.3 0.15 0.23 0.205 0.285 0.15 0.294 0.13 0.18 0.67 ISAT (A) 0.65 0.45 0.65 0.45 0.77 0.55 0.74 0.62 1.3 0.7 0.8 0.65 0.49
Murata LQH32CN4R7M53 LQH32CN100K53 LP04815-472MXC Coilcraft LP04815-103MXC 744031100 Wur th Elektronik (WE) 744031150 744042100 CDRH2014-100 Sumida CLS4D14 CLS4D14 TDK VLF3010AT 100HR49 shielded
7.2
CIN and COUT capacitors selection
The capacitance values and its intrinsic resistance (ESR) must be selected in order to reduce the output ripple. The ceramic capacitor technology offers the best compromise between the space and the performance (low ESR, value, voltage rating). Nevertheless, their values changes with the time as well as with temperature, DC bias voltage and switching frequency. Thus it might be necessary to use higher capacitor value if low ripple is an absolute need.
7.3
1.3. D, Boost diode selection
The diode selection is based upon two major criteria:
Low losses to get the best converter efficiency Mechanical size
7.3.1
Electrical characteristic
VRRM (Repetitive peak reverse voltage) is the first parameter to consider in the selection of the boost diode. Its value must be always higher than the reverse voltage (VR) occurring during the steady state. Note that, some transient voltages occurs during the commutation period due to the leakage inductance of the PCB. Generally, a power diode with a maximum reverse voltage equal or just higher than 20V suits perfectly. Therefore a Schottky diode technology can be used. Schottky diode has a low forward voltage, nevertheless they have an additional reverse current which provides additional losses at high ambient temperature.
17/31
Components selection
STLD20D
In fact, in boost backlighting converter, the conduction losses (Pcond) lead by the forward characteristics can be negligible compared to the losses induced by the reverse current (Prev), especially at high temperature.
7.4
RLED feedback resistance selection
The average output current is regulated by sensing a low external ohmic sensing resistor RLED. Thus, a constant current value is fixed for each LED whatever the ambient temperature conditions. RLED is given by:
VF B 0.3 V R L E D = ---------- = --------------- = 15 I L E D 20 m A [7]
7.5
Efficiency
Efficiency is a significant parameter for the application. The higher the efficiency, the longer the life time of the battery. The efficiency is given by:
P o u t p u t N VL E D I L E D E f f i c i e n c y = ------------------ = ------------------------------------------VI N Ii n p u t Pi n p u t [8]
.
18/31
STLD20D
PWM dimming control
8
PWM dimming control
By applying a PWM signal on the shutdown pin SHDN, the average current and the brightness of the LED can be adjusted. Figure 21. shows ILED current and the other typical waveform during this dimming control mode.
Figure 21.
Typical waveform when the PWM dimming is used at 300Hz
Vshutdown Vshutdown = 0.38 ILED
ILED
VOUT VOUT ILIM IL
Ireg
Note that the Load Disconnect Switch LDS turns ON/OFF at the same frequency and with the same duty cycle as the PWM signal. Thus, the LED current is a perfect square wave phased with the dimming signal. This leads to a good correlation between the real average current of the LED and the theoretical current given by:
IL E D T h e o= D C × IL E D
Where:
ILED: is the nominal current programmed by the RLED resistance DC: is the duty cycle of the dimming signal.
Figure 14. shows that the correlation between the real average current and the theoretical value is given for a minimum duty cycle of 5% when the dimming frequency is 300Hz and 20% for a 10kHz dimming signal.
19/31
Analog dimming control
STLD20D
9
Analog dimming control
Some application are sensitive to low frequency dimming signal; in this case an analog dimming control technic with a DC voltage Vdim to control the brightness of the LED can be used with the circuit shown Figure 22. The formula below gives the LED current versus the dimming voltage Vdim:
V F B ( R d i m + R d 1 + R L E D ) Vd i m ( R L E D + R d 1 ) I L E D = ------------------------------------------------------------------------------------------------------------------------------------Rd i m R L E D [ 19 ]
Where:
Vdim: Analog Dimming Voltage Rdim, Rd1: Resistors of the dimming circuit (see figure 26)
9.1
Minimum dimming current
The PWM control of the STLD20D has a minimum duty cycle DCMIN that limits the dimming current range. It exists a minimum dimming current ILEDC corresponding to the typical DCMIN of the control loop.
Figure 22.
Analogical dimming schematics
C1 R2 C2
LDS Vdim Rdim R1 Vfd Vfd Vref GND Rd1 RLED IL E D
PWM Ve STLD20D +
This minimum dimming current depends on the maximum input voltage and the forward voltage of the LED and can be estimated by:
( D Cm i n VI N ( m a x ) ) IL E D C -------------------------------------------------------------------------------------------------------------------------- [ 20 ] 2 Lt y p F t y p [ N VL E D + V F B V I N ( m a x ) ]
2
20/31
STLD20D Where:
Analog dimming control
VIN(max): is the maximum input voltage DCMIN: is the typical minimum duty cycle of the STLD20D (18%) Ltyp: is the typical vale of the inductance Ftyp: is the typical switching frequency
Figure 23. gives the ILED versus the LED branch voltage N.VLED. This curve is calculated with:
Ltyp = 10H, Ftyp = 500kHz, DCMIN = 18% and VIN(max) = 4.2VDC.
Figure 23.
ILEDC current vs N.VLED corresponding at the DCMIN
ILEDC (A)
0.014 0.012 0.010 0.008 0.006 0.004 0.002 0.000 9 10 11 12 13 14 15 16 17 18 19 20
ILEDC = f (VLED)
N.VLED (V)
Higher the voltage across the branch LEDs, higher the range current control. After these considerations, it is described here the basics rule to help the designer to choose the external components such as Rd1, Rdim and RLED versus Vdim and brightness control current ILED.
9.2
Rd1 Calculation
To avoid significant shifting of the cross over frequency and to keep enough high the corrector network gain of the error amplifier, it is recommended to dimension the resistor Rd1 below 10k (10% of R1). Dimension RLED for full brightness operating mode RLED is dimensioned to get the nominal current ILED for the full brightness of the LED. It is recommended to fix Vdim = VFB during the full brightness operating mode so that the LED current correspond to the programmed value ILED. Thus:
VF B R L E D = ---------IL E D [ 21 ]
21/31
Analog dimming control Where:
STLD20D
VFB is the feedback voltage ILED is the LED current for full brightness
Note:
If Vdim is equal to 0 the LED current can be higher the programmed value.
9.3
Rdim calculation for dimming mode control
Rdim and Rd1 are dimensioned to get a current in the dimming circuit much smaller than the LED current. From the formula 19, Rdim can be calculated by:
[ R d 1 + R L E D ] [ VF B V d i m m a x ] R d i m = -----------------------------------------------------------------------------------------I L E D m i n RL E D V F B [ 22 ]
Where:
Vdimmax is the maximum dimming voltage ILEDmin is the expected minimum dimming current
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STLD20D
Layout recommendation
10
Layout recommendation
The package connection of the STLD20D has been realized in order to facilitate the layout of the PCB. The golden rule to obtain an optimized layout is to split the power and signal track as shown on the Figure 24. It is necessary to place the input capacitor as closed as possible between pin1 and pin2 of the STLD20D package. If the CIN capacitor is not closed to the device, high frequency noise due to gate driver dI/dt flows through the copper track of the board and can generate some line voltage drop due to the line inductance. For the same reason, in order to eliminate high frequency current loop, the connection of the diode (D) and the output capacitor (COUT) must be as close as possible to the internal power MosFET (SW) (close to pin 8 and 1). Concerning the signal path, we recommend to create the PCB GND signal from the pin 1 ("A" point in the Figure 24.). Thus all signal references such as feedback and the voltage across Rset are not disturbed by the power stage.
Figure 24.
Layout suggested
D L
8 STLD20D RLED
A COUT 1 2
RSET
GND CIN VIN SHDN
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Evaluation board
STLD20D
11
Evaluation board
Figure 25. shows the top view of the evaluation board that show all the application features of the STLD20D.
Figure 25.
Evaluation board top view with its connections at the external equipment
Figure 26. Demo board layout top view
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STLD20D
Package mechanical data
12
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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Package mechanical data
STLD20D
QFN8 (3x3) MECHANICAL DATA
DIM. A A1 A2 A3 b b1 D D2 E E2 e K L L1 L2 r r1 0.15 0.15 0 .20 0 .20 0 .16 0.29 0.24 0.45 0.40 0.13 0 .006 0 .006 1 .11 1 .92 0 .65 0 .15 0 .29 0 .17 3.00 2.02 3.00 1.21 0.65 0.00 8 0.00 8 0.00 6 0 .011 0 .009 0.01 8 0.01 6 0.00 5 1.31 0.04 4 2.12 0.07 6 mm. MIN. 0 .80 TYP 0.90 0.03 0.70 0.20 0.31 MAX. 1.00 0.05 0.75 0.25 0.39 0.30 0.02 6 0.00 6 0.01 1 0.00 7 0 .118 0 .080 0 .118 0 .048 0 .026 0.05 2 0.08 4 MIN. 0.03 2 inch TYP. 0 .035 0 .001 0 .028 0 .008 0 .012 MAX. 0.03 9 0.00 2 0.03 0 0.01 0 0.01 5 0.01 2
751 7789
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STLD20D
Package mechanical data
SOT23-8L MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.35 0.90 0.00 0.90 0.22 0.09 2.80 2.60 1.50 0 .65 1.95 0.55 13.7 TYP MAX. 1.45 0.15 1.30 0.38 0.20 3.00 3.00 1.75 MIN. 35.4 0.0 35.4 8.6 3.5 110.2 102.3 59.0 25.6 76.7 21.6 TYP. MAX. 57.1 5.9 51.2 14.9 7.8 118.1 118.1 68.8 mils
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Package mechanical data
STLD20D
Tape & Reel QFNxx/DFNxx (3x3) MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.3 3.3 1.1 4 8 1 2.8 20.2 60 18.4 0 .130 0 .130 0 .043 0 .157 0 .315 TYP M AX. 330 13.2 0.50 4 0.79 5 2.36 2 0.724 MIN. TYP. MAX. 12.9 92 0.51 9 inch
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STLD20D
Package mechanical data
Tape & Reel SOT23-xL MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.13 3.07 1.27 3.9 3.9 3.23 3.17 1.37 4.0 4.0 12.8 20.2 60 14.4 3.33 3.27 1.47 4.1 4.1 0.123 0.120 0.050 0.153 0.153 0.127 0.124 0.054 0.157 0.157 13.0 TYP MAX. 180 13.2 0.504 0.795 2.362 0.567 0.131 0.128 0.0.58 0.161 0.161 0.512 MIN. TYP. MAX. 7.086 0.519 inch
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Revision history
STLD20D
13
Table 6.
Da te
Revision history
Revision history
Revision 1 2 3 4 Initial release. Table 4 on page 4 following parameters values updated: . ILED (min), IQ (min), SW (QFN max), LDS (QFN max), ILIM, Hyst OT . FB VAR symbol changed to Line and value changed from 0.7 to 0.9 mA/V Change figure 25, add figure 26 and new template. The SW, LDS and DCMIN values on table 4 have been updated, add note in ILIM. Changes
3-Aug-2004 12-Oct-2004 08-May-2006 23-Oct-2006
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STLD20D
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