Section
Author's Guide | Reviewer's Guide

ST Journal of System Research
Wireless Communications

Vol. 1, No. 1, February 2004 - Art. 7
 
Advanced Architectures For High-Throughput Turbo-Decoders

by
Frank Gilbert, Frank Kienle, Gerd Kreiselmaier, Michael J. Thul, Timo Vogt, Norbert When (Microelectronic System Design Research Group University of Kaiserslautern, Germany), Friedbert Berens (STMicroelectronics)

Copyright
© STMicroelectronics, University of Kaiserslautern, 2003
 
Abstract
Turbo-Codes are the forward error correction scheme used in many communication standards. Existing implementations, however, only offer special solutions in the design space. Moreover, they are unable to provide a sufficiently high throughput for future applications (> 50MBit/s).
We present a thorough survey of the design space from a communications view of the system and algorithmic transformations down to the architectural concepts for VLSI design of high throughput Turbo-Decoders. A design example of a 60MBit/s Turbo-Decoder demonstrates our methodology.
 
 

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