In order to allow an easy and quick implementation of the custom project, a Development Kit is available, supporting the FPGA customization mode.
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Development Board |
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In detail, composed of:
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Development Board constituted with: |
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SPEAr Head SPEAR-09-H022 |
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FPGA: Xilinx 4M gates |
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4 cuts of 8 MB Flash |
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1 cut of 64 MB DDR133 |
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bent for one more DRAM cut |
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connectors:
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2 USB Host ports |
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1 USB Device port |
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RJ45 Ethernet connector |
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3 DB9 connectors for UARTs |
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6 GPIOs |
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16 pins for ADC channels |
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2 JTAGs: one for SPEAr Head and
one other for the FPGA |
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Power supplier: |
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European power cord |
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USA / Japanese power cord |
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CD ROM with: |
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Development Board HW documentation |
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SPEAr Head datasheet and user manual |
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SPEAr Head Development Board SW user manual |
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SPEAr Head device driver user manual for Linux OS |
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Linux Kernel source tree for SPEAr Head
platform - based on ELDK 3.1 |
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Basic Root File System |
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SW applications example |
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Design flow tutorial |
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Demo |
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Development bank description |
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Xilinx DVD of ISE Foundation
8.1i Evaluation - 2 month shererable |
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