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Power bipolar high current density
The new high-efficiency, low voltage technology

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The popularity of portable equipment such as notebooks, PDAs and cell phones, has led silicon manufacturers to produce smaller devices without sacrificing their performance. In fact, portability implies ever smaller and lighter equipment while at the same time, constant performance improvement offered by this equipment, requires increasingly efficient power switches, able to minimize power loss.

 
POWER BIPOLAR-HCD
This guarantees longer battery life time and better heat dissipation. As a result, new power switches need to be designed with lower collector-emitter saturation voltage (VCE(sat)), higher current gain, and faster switching speeds.
Always involved with application-specific, high performance power switch development, ST is meeting the latest marketing needs with the new, low voltage PB-HCD (power bipolar high current density) technology.

PB-HCD Functional Description


The new PB-HCD technology is an evolution of the base island technology and is optimized to work in the 10V to 100V voltage range and the 0.5A to 10A current range.
This new technology offers higher emitter efficiency achieved due to an increase of base island units (up to 1.4 times). Consequently, this new family can manage a higher level of current for the same silicon area as well as a lower collector-emitter saturation voltage, thus guaranteeing lower losses in ON state.

POWER BIPOLAR-HCD
Base island units density comparison

Smaller Devices for Higher Performance


The comparison between the PB-HCD and base island performance shows a higher current capability (between 15% and 20% more), which provides a higher gain characteristic as well as an excellent VCE(sat) (between 55% and 65% less).
The behavior of hFE and VCE(sat) as compared to previous technologies is illustrated in the figures below.


POWER BIPOLAR-HCD
Gain curve technology comparison


POWER BIPOLAR-HCD
VCE(sat) curve technology comparison

Temperature differences between the base island and PB-HCD technologies are calculated using the following formula:
TJ = Ta + Rth x VCE(sat) x Ic
Where:
Measurements were taken from transistors contained in SOT-223 packages,
IC = 2A,
IB = 100mA

Thermal analyses are shown below, where it is clear that power dissipation is reduced by 30%.
The higher PB-HCD technology performance offers designers smaller package and footprint options for their portable products and applications.

POWER BIPOLAR-HCD
VCE(sat) curve technology comparison

PB-HCD Products


The first PB-HCD technology products are:

The complementary transistor pair 2STR1215 and 2STR2215; these are specifically designed for battery charging circuits, power switches and DC/DC converters

The 2STF1360 (SOT-89), 2STN1360 (SOT-223), 2STX1360 (TO-92) and 2STL1360 (TO-92L); these are designed for LCD backlighting and
MOSFET and IGBT gate drivers.

Features


Voltage range from 10V to 100V
Current range from 0.5A to 10A
High hFE and very low VCE(sat) at high current operation
Wide choice of surface-mount and thru-hole packages
Possible NPN and PNP combination in multi-chip device

Benefits


High current capability
High efficiency
Low ON state losses
Very high power dissipation
Reduced package size

Applications


LCD backlighting
Battery charging circuits
Power switches
MOSFET and IGBT gate drivers
DC/DC converters
Motor control

Part Numbering System


A new nomenclature is used to define each low voltage power bipolar transistor made with the PB-HCD technology. It includes information on packages, current levels and breakdown voltage.


POWER BIPOLAR-HCD
New PB-HCD low voltage bipolar nomenclature