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The key to MDmeshT's outstanding performance is a new drain structure in which the drain is implemented as an array of partitions, with vertical p-type drain strips aligned with the horizontal n-type source strips that are the key feature of the Mesh Overlay technology. This approach allows breakdown voltage to be more than doubled compared to conventional drain structures; for example, an MDmeshT MOSFET designed to withstand 500V exhibits the same drain resistivity and thickness as that of a conventional 200V MOSFET, which means that an MDmeshT MOSFET will have a much lower ON-resistance than conventional devices designed to withstand the same source-drain breakdown voltage. The process used to build the vertical structure has been optimized to allow high process capability and high yield. |
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In the PC and lighting market the 2% increase in efficiency translates into a significant and measurable saving in worldwide energy consumption and CO2 emission, reconfirming ST's commitment environmental protection. |
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Smaller heatsinks
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Cost saving
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Higher efficiency
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Safe operation in bridge topologies |
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Drastic reduction of on-resistance
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Gate resistance minimized
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3 times lower gate charge than std. MOSFETs
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Improved diode dv/dt capability
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On-losses reduction
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Turn-off improvement and reduction in switching losses
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Input and output capacitances smaller than std. MOSFETs |
The Mesh Overlay technique pioneered by ST back in 1995 has allowed a tight control of the internal gate resistance and improve the gate charge by roughly 3 times resulting in a remarked improvement of its dynamic capability.
The MDmesh family will also feature built-in fast recovery diodes ”FRED” to suit the ever spreading ZVS (zero voltage switching) phase-shift topologies.
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| Output characteristics of MDmesh™ versus standard MOSFET |
 The increasing demand for more efficient AC-DC converters as those requested by the booming telecom market is naturally matched by the MDmesh due to its lower switching losses (because of lower intrinsic capacitance, shorter delay time, shorter crossover time and much smaller gate charge) and lower on-state losses (because of reduced RDS(on)).
The lower gate charge greatly simplifies gate drive circuits.
Because MDmesh™ also includes the highly successful Mesh Overlay process and a gate finger layout that provide a highly effective means of controlling internal gate resistance, the new technology also offers outstanding dynamic performance, significantly better than similar products from competition power MOSFETs. For example, gate charge is typically more than 40% lower than competitive devices, leading to faster turn-off and lower switching losses.
Unsurpassed dV/dt Capability |
MDmesh™ devices also exhibit the other major Mesh Overlay benefits, including a simplified manufacturing process with precision alignment required in only one dimension instead of two, and reduced corner effects, leading to better electrical breakdown characteristics. As a result, MDmesh™ devices exhibit unsurpassed dV/dt capability and avalanche ruggedness.
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Low on-resistance is a highly desirable characteristic in a power MOSFET but it is not the only factor contributing to total losses. What gives MDmesh technology its overwhelming superiority over other power MOSFET technologies is the "cross-fertilization" factor - the combination of the vertical drain structure with ST's proprietary Mesh Overlay horizontal layout. The Mesh Overlay technique allowed ST designers to maintain a tight control of the internal gate resistance, now guaranteed in the datasheet. The gate charge is reduced by roughly a factor 3. Thus greatly improving the dynamic capability. In addition, the temperature dependence of the on-resistance is also reduced compared to conventional high voltage MOSFETs.
External gate resistance 4.7 Ohm |
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| With guaranteed low gate resistance, MDmesh greatly reduces the delay time, allowing faster switching time for more efficient SMPS design. |
Competition trials show inferior switching performance due to a longer delay time. |
MDmesh design has been fully optimized for low switching losses applications as shown by the inductive load switching turn-off waveform. Looking at applications such as medium power SMPS.
The MDmesh advantages of lower switching losses (because of lower intrinsic capacitance, shorter delay time, shorter crossover time and much smaller gate charge) and lower on-state losses due to the reduced RDS(on) result in significant improvements in system efficiency. The lower gate charge allows the use of smaller and more economic gate drive circuits.
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