AN1865 - APPLICATION NOTE
SMPS FOR LOW END TV SET WITH VIPer53
F. GENNARO - C. SPINI
ABSTRACT In this paper a low cost power supply for 90 TV set (14" to 21") is introduced. The converter uses the new VIPower device VIPer53 in DCM Flyback configuration with either primary or secondary regulation. It provides 60W peak output power on 3 isolated outputs using a DIP-8 package device. The power supply has been specifically developed for European input range. IN TRODU CTION
The VIPer is a family of integrated smart power IC that makes easier size and cost optimization in switch mode power supplies. The devices are based on PWM current mode control and provide integrated high-voltage start-up circuit and protections such as current limiting, thermal shutdown and over/under voltage detection. VIPer53 represents the latest generation of VIPer family and uses multichip approach in chip to chip fashion to integrate in a single package a PWM controller in VIPower M0 technology and a 620V MDMesh Power MOSFET. It is housed in DIP-8 and PowerSO-10 package for through-hole or SMD mounting. Although the Mosfet is based on the standard MDMesh technology, it features integrated current sense by means of a SenseFET in order to perform current mode control, avoiding the use of an external sensing resistor. One more feature has been introduced in this last generation: the overload control, by means of a dedicated pin TOVL, which allows to manage the overload event regardless of transformer quality in hiccup mode. The power supply provides 3 isolated outputs: 105/115V dedicated to the deflection, 13V dedicated to the audio and a 6.5V dedicated to the P. The first output can be set to either 105V or 115V by means of a jumper in order to properly drive the 14"-21" CRT yokes. A trimmer allows manual adjustment of the output voltage. The feedback is typically taken at primary side, on the auxiliary winding of the transformer, but isolated secondary regulation on the 105/115V output can be arranged on the proposed board by means of optocoupler. Both regulations use TL431 in the feedback loop. The power supply has been specifically developed for European input range, i.e. 185-265Vac. 1. APPLICATION DESCRIPTION AND DESIGN The proposed power supply has been designed referenced to the specifications listed in Table 1. The switching frequency has been selected considering transformer size, power losses and EMI behaviour, since according to EN55022 standard for conducted emissions the harmonics to be evaluated are in the range from 150kHz to 30MHz. The target efficiency is higher than 70% with a maximum duty cycle of 45% at minimum input voltage, always in discontinuous conduction mode. Primary or secondary regulation can be performed and both regulations use TL431 to provide trimmable voltage reference for the 105V/115V output. The other two outputs take advantage of transformer cross regulation by means of optimized winding layout. The 5V output is post-regulated using a standard linear voltage regulator for high accuracy and stability.
May 2004 1/16
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
AN1865 - APPLICATION NOTE
The input EMI filter consists in a Pi-filter for both differential and common mode emissions. A standard RCD circuit connected to ground is used to limit dv/dt of the drain voltage for noise issue in the TV set. Moreover, a light RCD clamper is connected to the drain in conjunction with a peak clamp for the peak voltage management during transient conditions, as shown in the schematic in Figure 3. The VIPer makes power supply design easier considering start-up, current sensing and no-load issues, improving the overall efficiency and simplifying the circuit. The short circuit protection is provided with hiccup mode and overload is controlled by TOVL pin. However an input 5*20 fuse is used to protect the system against catastrophic failures. The input section also has an NTC to limit the inrush current of the bulk capacitor during the start-up of the power supply. The switching frequency is set by R5 and C16 according to the diagram given in the datasheet. C13 is the VIPer supply capacitor connected on VDD pin. Moreover, VIPer53 has a built-in burst mode circuit that allows cycle skipping under low load condition, improving stand-by performance. Such a control has been improved compared to the old VIPer generation using a variable blanking time: 150 or 400 ns.
Table 1: SMPS Specifications
Input voltage Output power (peak) Outputs Out1 Out2 Out3 Switching frequency 185-265 Vac 60W 3 105V/115V at 450mA; P1=47.3W, 2%
13V at 600mA; P2=9.1W, 2% 6.5V at 80mA; P3=0.52W, 2% 50 kHz
1.1 FLYBACK TRANSFORMER In the considered application the Flyback transformer has 5 windings, since one winding is dedicated to supply the VIPer, as listed in table 2. Winding arrangement is shown in Figure 1, while transformer pinout and dimension are shown in Figure 1. Due to the presence of 105V/115V output, the reflected voltage has been set to 120V. The transformer is a slot type with ETD34 core, manufactured by TDK. A layer type transformer can be used as well, as shown in Figure 3. Table 2: SMPS Specifications C o re Primary inductance Lp Leakage inductance Output 105V Output 115V Output 13V Output 6.5V Au x
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
ETD 34 TDK 740H 10%63 turns 15H max1.8% Lp Windings specs 48 turns 53 turns 6 turns 3 turns 6 turns
2/16
AN1865 - APPLICATION NOTE
Figure 1: Transformer layout
7 2
115V PRIMARY
3 4
105V
6 8
6.5V
10 11 14
AUX
13 PRIMARY SIDE 12
13V
SECONDARY SIDE
Figure 2: Transformer pin out and dimensions
Figure 3: Transformers
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
3/16
AN1865 - APPLICATION NOTE
1.2 VOLTAGE FEEDBACK Voltage feedback is realized either in primary or secondary side. Both configurations use TL431 with a trimmer in the voltage divider network to adjust the reference voltage, as shown in figure 5. In primary regulation, the auxiliary winding provides both the supply voltage to the VIPer and the regulation voltage using two separated circuits, by means of two rectifier diodes, as shown in the schematic. In particular, R7 and D6 provide the supply voltage while R21 and D9 provide the regulation voltage. Doing so, it is possible to get good regulation at minimum load, with consequent improvement of the stand-by performance, and to easily provide short circuit protection in hiccup mode. The board has been developed on a 125x80mm Cu single side 70m FR-4 frame, as shown in figure 4. Figure 4: PCB layout
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
4/16
AN1865 - APPLICATION NOTE
Figure 5: Circuit schematic
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
5/16
AN1865 - APPLICATION NOTE
Table 3: Component list
Reference F1 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 RS C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 Description T2AL250V Fuse 5x20 NTC 10K 3.3K 330K 6.8K 22 4.7 91 68K 4.7K 47K 12K 1K Trimmer 2.2K 1K Trimmer 2.2K 120K 10K 220 0 150 47 3.3 3W dv/dt Limiter Resistor 100nF - 250V X2 Capacitor 100nF - 250V X2 Capacitor 1nF - 250V 1nF - 250V 47 F - 400V 1nF - 600V 330nF - 25V 47 F - 200V 4.7 F - 200V 470 F - 25V 100nF - 25V 100nF - 25V 10 F - 25V 1000 F - 35V 100 F - 35V 4.7nF - 25V 10nF - 25V 100nF - 25V Note
For secondary regulation Not connected
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
330nF - 25V
2.2nF - 250V Y1 Capacitor 100nF - 25V 100 nF - 200V 100nF - 25V
6/16
AN1865 - APPLICATION NOTE
Table 3: Component list (continued)
Reference C24 C25 C26 CS D1 D2 D3 D4 D5 D6 D7 DS D9 L1 T1 T2 U1 U2 U3 U4 U5 Description 100 F - 16V 220pF 100nF - 25V 220pF - 600V dv/dt Limiter Capacitor DF06M 1A - 600V STTH106 STMicroelectronics P6KE180A 1N4148 STMicroelectronics STTH106 STMicroelectronics 1N5819 STMicroelectronics STTH302 STMicroelectronics STTH106 1N4148 330nH TDK SRW34ETD8-E03V0121 TDK SRW35EC-T89V017 15mH S+M B82732 STMicroelectronics VIPer53DIP STMicroelectronics TL431 TCDT102G STMicroelectronics TL431 STMicroelectronics LE50CZ Note
Layer Slot
Figure 6: Board
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
7/16
AN1865 - APPLICATION NOTE
2. LAYOUT RECOMMENDATION Since EMI issues are strongly related to layout, a basic rule has to be considered in high current path routing, i.e. the current loop area has to be minimized. In particular, such a rule has to be applied to the input filter section, the clamper and the dv/dt limiter sections One more consideration has to be done regarding the ground connection: in fact in order to avoid any noise interference on VIPer logic pins the control ground has to be separated from power the ground. This results in a dedicated track for ground connection of C12, C13, C16, C17, C18, U2 anode and U3 collector. 3. EXPERIMENTAL RESULTS 3.1 - PERFORMANCES AND TYPICAL WAVEFORMS The performances of the power supply have been evaluated only using primary regulation, in terms of voltage regulation and power consumption. The board can also be configured for secondary regulation, even if this is not typical for such a TV set. Finally typical waveforms are shown. In Table 4 and 5 the main experimental results on 14" and 21" chassis are listed. The converter features excellent voltage regulation as the input voltage changes, with low power consumption at no load and efficiency as high as 87% at full load. In Figure 7 the drain voltage VDS at no-load and different input voltage Vin is shown; the automatic burst mode management is evident. In Figure 8 the drain voltage VDS at full load is shown at 185VAC and 265VAC input voltage, respectively, in order to evaluate the maximum duty cycle and the maximum drain voltage under nominal operation. In Figure 9 V DS and VDD during start-up at 230VAC and typical load are shown, while in Figure 10 V DS and Vout3 during start-up 265VAC with stand-by load and full load are shown, respectively. Thanks to the internal current generator, which provides constant current, the start up time is independent of the input voltage and only depends on the VDD capacitor value. In Figure 11 the dynamic load regulation is shown as a step load variation is applied on the audio and both audio and video output, respectively. Table 4: TV chassis typical consumptions
V1 V2 V3
H. Deflection P and logic Audio
bs O
These measurements have been performed applying an average video consumption (like an average real TV picture) and maximum audio output driven by a sinewave signal at 3KHz. In order to allow the normal operation of the TV chassis a slight modification is required: as the output voltage V2 drops from 8.3V to 6V, the standard linear regulator on the chassis is changed with an LDO type. The same set of test has been performed on boards with both kinds of transformers, i.e. slot and layer type. As shown in Table 5 the power supply performances are similar with both transformers, the picture stability (screen modulation) due to the audio load variation is good too. The two kinds of transformers can be used on the same board assuring the same performance: the only difference related to the transformer construction is the use of a small RC snubber across D7 using the slot transformer because of the minimum 20% margin required by the diode VRRM, since it damps the voltage ringing across the
let o
Pr e
100.3 7. 7 10. 4
du o
V
(s) ct
14" mA 274 230 500
so Ob Pin 42 W
te le
ro P
uc d
s) t(
21" Pout V 105. 6 8. 3 11.3 mA 380 260 600 Pout 49W Pin 57W
34.4W
8/16
AN1865 - APPLICATION NOTE
diode. Such an adjustment has led to lower dv/dt value of the drain voltage, as shown in Figure 12, and consequently to lower radiated noise level which has its importance in the case of low antenna signal (typical for portable TV set). Table 5: Power measurements with 21" TV chassis in normal operation at 230Vac Normal operation at 230VAC V SLOT V1 V2 V3 LAYER V1 V2 V3 105. 4 6.24 12.5 103. 9 6.16 12. 62 mA 380 262 610 378 265 600 55.34 48. 47 56.47 49. 3 87. 3% Pin Pout Efficiency
Figure 7: V DS at no load
Vin=185VAC
bs O
let o
ro P e
du
(s) ct
so Ob -
te le
ro P
uc d
s) t(
87. 6%
Vin=230VAC
Vin=265VAC
9/16
AN1865 - APPLICATION NOTE
Figure 8: V DS at full load
Vin=185VAC
Vin=265VAC
Figure 9: V DS and VDD during start-up at 230VAC and typical load
Figure 10: V DS during start-up at 230VAC: stand-by and full load
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
10/16
AN1865 - APPLICATION NOTE
Figure 11: Dynamic load regulation at Vin=230VAC
CH2=V13V, CH3=V115V, CH4=I13V=100/600mA, I115V=380mA, I5V=260mA
CH2=V13V, CH3=V115V, CH4=I13V=100/600mA, I115V=200/380mA, I5V=260mA
Figure 12: Drain voltage dv/dt at Vin=325VDC and full load, using slot and layer transformers
3.2 STAND-BY PERFORMANCE
Typical waveforms of the circuit with nominal stand-by load have been shown in figure 7. During such a load condition, the power supply operates in burst mode thanks to the internal control circuit of the VIPer53, which allows power consumption saving due to lower switching losses. Inside the burst the maximum switching frequency is the nominal, fixed by the RC connected to OSC pin of the VIPer.
bs O
VIPer53 features improve stand-by performance thanks to variable blanking time, which is made longer, i.e 400ns, than the normal mode value, i.e. 150ns, during burst mode. This change is triggered according to COMP pin voltage: if VCOMP>1V the blanking time is set to 150ns typical, while it is set to 400ns typical if 0.5V
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
11/16
AN1865 - APPLICATION NOTE
The power consumption during the TV stand-by operation has been measured with both transformers: the measured values are similar using both slot and layer type, as listed in Table 6. Of course, using secondary regulation the input power consumption would be considerably reduced, since the output voltages will be regulated at lower values. Table 6: Stand-by measurements STAND-BY at 230Vac V mA 153. 8 0 8. 4 50 18. 54 0 153. 3 8. 2 18. 59 0 50 0
SLOT
V1 V2 V3 V1 V2 V3
Pin [W] 2. 4
Pout [W] 0. 42
LAYER
2.35
0. 41
Figure 13: Waveforms during stand-by to full load and viceversa transitions at Vin=230VAC
3.3 SHORT CIRCUIT BEHAVIOUR
bs O
The short circuit behavior has been considered for the three outputs shorting them one by one. Figure 14 shows the VIPer53 typical waveforms behavior during the short circuit. When a short occurs the controller enters hiccup mode, working only for a short period as shown in the figure. This behavior limits the average power dissipation of all the devices, preventing dangerous overheating and catastrophic failures of the SMPS. VIPer53 features a new integrated overload control circuit, which is implemented on the TOVL pin and does not lie on the transformer coupling quality between output and auxiliary for hiccup mode. In fact, the device monitors the COMP pin voltage and as soon as its value is higher than 4.35V, an internal current source is activated to charge up the T OVL capacitor, until the voltage across this latter pin reaches 4.0V. This is the threshold voltage to stop switching cycle and V DD voltage will decrease below VDDoff value, thus entering hiccup mode with a controlled duty cycle. In any case, if VCOMP goes below the OVL
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
12/16
AN1865 - APPLICATION NOTE
threshold, normal operation conditions are resumed. It is important to point out that the maximum value of the peak drain current to consider for design purpose is the I DMAX, called drain current capability, which is the maximum drain current that does not trigger the overload protection and defines the maximum output power that the power supply can deliver. Some constraints have to be considered for T OVL capacitor design, since the start-up of the power supply do not have to be influenced. The following condition has to be checked regarding TOVL and VDD capacitors:
COVL > 12.5 10 -6 tSS
1 C I C VDD > 8 10 - 4 - 1 OVL DDch 2 D V DDhyst RST I DD1 t SS CVDD > VDDhyst
where t SS is the rise time of the output voltage, DRST is the re-start duty cycle under short circuit or overload conditions, IDD1 is the operating supply current during switching, IDDch2 is the start up charging current for V DD higher than 5V and VDDhyst is the VDD start up threshold. The last 4 parameters are defined in the datasheet. With such a selection of the two capacitors a proper start up of the power supply is guaranteed and a typical 10% of restart duty cycle is achieved, avoiding overheating of both the transformer and the output diodes and consequently catastrophic failure. 3.4 OPEN LOOP FAILURE
Open loop failure has also been considered as a faulty operation. Under such a condition the device will control the output voltage thanks to the presence of a fast internal error amplifier, which starts working as soon as the VDD voltage reaches 15V. This loop regulates the auxiliary voltage at 15V thus maintaining the deflection voltage below the regulation value and avoiding the X-ray emission by an abnormal EHT voltage applied to the CRT anode. Figure 14: Typical waveforms during short circuit at Vin=230VAC
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
3.5 EMI MEASUREMENTS Conducted EMI measurements have been performed according to EN55022 Class B standard, using a 50W LISN and a spectrum analyzer. The quasi peak conducted noise measurements with the power
13/16
AN1865 - APPLICATION NOTE
supply connected to the 14" chassis has been performed at full load condition and nominal 230Vac input voltage; the results are shown in figures 15 and 16. The measurements have been taken both on the line (L1) and neutral (L2) conductors. In both conditions the power supply has passed the pre-compliance test on conducted emissions. Figure 15: L1 and L2 quasi peak measurements V IN=230VAC - 50Hz, with slot transformer
Figure 16: L1 and L2 quasi peak measurements V IN=230VAC - 50Hz, with layer transformer
3.6 THERMAL MEASUREMENTS
bs O
Temperature measurements have been performed in order to provide reliable operation condition for all the circuit components. In Table 7the measured values with Tamb=23C are listed. The VIPer53 in DIP-8 package takes advantage of the small copper area connected to the drain pin to act as a heat sink. Table 7: Main component temperature at full load Device
VIPer53 R snubber C snubber
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
T at 230VAC 68 65 42
14/16
AN1865 - APPLICATION NOTE
D7 (105/115V) D8 (5V) D9 (13V) Transformer Bridge
59 35 43 34 58
4. CONCLUSIONS In this paper an SMPS for 90 TV has been introduced and analyzed. Thanks to VIPer53 features the design of the power supply is really straightforward, yielding to a cost effective solution. The built-in functions and protections of the VIPer53 reduce the external component count, simplifying the overall circuit. Recently introduced features improve both stand-by and overload operations. Moreover, EMI behavior and thermal performance allow the use of standard components and materials for the PCB, keeping the cost of the whole system low. The voltage regulation performance confirms the VIPer53 as the device of choice for low cost high performance power supplies as required by the low end TV set market. For further information please visit STMicroelectronics VIPower web site: www.st.com/vipower.
bs O
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
15/16
AN1865 - APPLICATION NOTE
bs O
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2004 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectro nics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. h ttp://www.st.co m
let o
Pr e
du o
(s) ct
so Ob -
te le
ro P
uc d
s) t(
16/16
|
