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ST2S06A33 / ST2S06B synchronous dual buck converter with reset

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Last Updated: 18/09/2008

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Dual synchronous rectification with reset or inhibit, 0.5 A, 1.5 MHz adjustable step-down switching regulator

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AN2681 Application note
ST2S06A33 / ST2S06B synchronous dual buck converter with reset
Introduction
The ST2S06 is a dual synchronous step-down DC-DC converter optimized for powering low-voltage digital cores in ODD applications and, generally, used to replace the high current linear solution when the power dissipation may cause a high heating of the application environment. It provides up to 0.5 A over an input voltage range of 2.5 V to 5.5 V. A high switching frequency (1.5 MHz) allows the use of tiny surface-mount components. A resistor divider to set the output voltage value, an inductor and two capacitors are required for every channel. In addition, a low output ripple is guaranteed by the current mode PWM topology and by the use of low ESR surface-mount ceramic capacitors. The device is thermal protected and current limited to prevent damage due to accidental short-circuit. The family is available in the QFN12L (4x4 mm) package. Figure 1. ST2S06 - simplified schematic

* Only ST2S06A/D ** Only ST2S06B

September 2008

Rev 2

1/23
www.st.com

Contents

AN2681

Contents
1 ST2S06 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 1.2 1.3 Inhibit function (ST2S06B only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Reset function (ST2S06A and ST2S06D only) . . . . . . . . . . . . . . . . . . . . . 7 Shor t-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2

Selecting components for applications . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1 2.2 2.3 2.4 2.5 Output voltage selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3 4

Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Demonstration board usage recommendation . . . . . . . . . . . . . . . . . . . 16
4.1 External component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1.1 4.1.2 Capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5 6 7

Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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AN2681

List of figures

List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. ST2S06 - simplified schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Inductor current at light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Output voltage ripple at light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Inductor current in PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Output voltage ripple in PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ST2S06B - inhibit voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ST2S06A\D - reset block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ST2S06A\D - reset function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pull-up resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ST2S06D - delay time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Reset_in threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 TDEL vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Feedback voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Demonstration board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Demonstration board - top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Demonstration board - bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Demonstration board schematic for ST2S06A\D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Demonstration board schematic for ST2S06B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Efficiency vs. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Efficiency vs. inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Efficiency vs. output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 QFN12L (4x4 mm) footprint recommended data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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ST2S06 description

AN2681

1

ST2S06 description
The ST2S06 is a dual adjustable current mode PWM synchronous step-down DC/DC converter with an internal 0.5 A power switch. It is a complete 0.5 A dual switching regulator with internal compensation that eliminates the need for additional components. The device is available in three versions, the ST2S06A and ST2S06D with a reset function and the ST2S06B with an inhibit function. The ST2S06 family operates with typically 1.5 MHz fixed frequency. To maintain good efficiency at both channels, the devices operate in power-save mode at light load (Figure 2 and 3). When the load increases it automatically switches to PWM (pulse width modulation) mode in order to reduce the output voltage ripple (Figure 4 and 5). Figure 2. Inductor current at light load

V i n= 5 V Vout1=3.3 V Vout2=1.2 V Iout1=20 mA Iout2=100 mA

4/23

AN2681 Figure 3. Output voltage ripple at light load

ST2S06 description

V i n= 5 V Vout1=3.3 V Vout2=1.2 V RLOAD1=150 RLOAD2=15

Figure 4.

Inductor current in PWM

V i n= 5 V Vout1=3.3 V Vout2=1.2 V Iout1=500 mA Iout2=500 mA

5/23

ST2S06 description Figure 5. Output voltage ripple in PWM

AN2681

V i n= 5 V Vout1=3.3 V Vout2=1.2 V RLOAD1=10 RLOAD2=3.3 To clamp the error amplifier reference voltage, a Soft Start control block generating a voltage ramp is implemented. When switching on the power supply, it allows controlling the inrush current value. Figure 6. Inrush current

Vin=5 V Vout1=3.3 V Vout2=1.2 V RLOAD1=10 RLOAD2=3.3 Other protection circuits in the device are the thermal shutdown block which turns off the regulator when the junction temperature exceeds 150 C (typ.) and the cycle-by-cycle current limiting that provides protection against shorted outputs. Operation of the device requires few components: two inductors, three capacitors and two resistor dividers. The inductors chosen must be capable of not saturating at the peak current level. The value of the inductors should be selected keeping in mind that a large inductor value increases the efficiency at low output current and reduces output voltage ripple, while
6/23

AN2681

ST2S06 description a smaller inductor can be chosen when it is important to reduce the package size and the total application cost. Finally, the ST2S06 family has been designed to work properly with X5R or X7R SMD ceramic capacitors both at input and at output. These capacitors, thanks to their very low series resistance (ESR), minimize the output voltage ripple. Other low ESR capacitors can be used according to the need of the application without compromising the correct functioning of the device. Due to the high switching frequency and peak current, it is important to optimize the application environment by reducing the length of the PCB traces and placing all external components near the device.

1.1

Inhibit function (ST2S06B only)
The ST2S06B features an Inhibit function (pin 10). When the Inh voltage is higher than 1.3 V the device is On and if it is lower than 0.4 V the device is OFF. In shutdown mode consumption is lower than 1 A. The Inh pin does not have an internal pull-up which means that you cannot leave the inhibit floating. If the inhibit function is not used, the Inh pin must be connected to Vin. Figure 7. ST2S06B - inhibit voltage vs. temperature
1.5 1.3
Vinh (V)

1.1 0.9 0.7
Vin=5V, Iout1,2=100mA

ON 50 75 100

OFF 125

0.5 -50

-25

0

25

T [C]

1.2

Reset function (ST2S06A and ST2S06D only)
Most ODD applications require a flag showing that the input voltage is in the correct range.

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ST2S06 description Figure 8. ST2S06A\D - reset block diagram
Vin_A

AN2681

Reset_out

Delay

Ref

Figure 8 shows the simplified reset block diagram. A comparator senses the input voltage. When it is higher than VTL (4.2 V for ST2S06A or 3.7 V for ST2S06D), the reset_out pin goes to high impedance. If it is below VTH (4.6 V for ST2S06A or 4.55 V max for ST2S06D), the reset_out pin goes to low impedance with a delay of 100 ms (typ.) for ST2S06A or 65 ms (typ.) for ST2S06D (see Figure 9 and 11). Figure 9. ST2S06A\D - reset function

VIN Reset

V TH tDEL V TL

The use of the Reset function requires an external pull-up resistor which must be connected between reset_out pin and Vin or Vout. We suggest using a pull-up resistor for reset in the range of 100 k to 1 M. If the reset function is not used, the reset_out pin must remain floating on the board. In the application board (Figure 10), Rpi is used to pull up the reset_out pin to Vin and Rpo to pull up the reset_out pin to Vout1. Of course the reset_out pin can be connected only to Vin or Vout.

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AN2681 Figure 10. Pull-up resistor

ST2S06 description

Figure 11. ST2S06D - delay time

Vin=3.6 V to 5 V Rpo=120 k

Figure 12. Reset_in threshold vs. temperature
4.7 4.5
Vres (V)

4.3 4.1 3.9 3.7 3.5 -50 -25 0 25 50
T [C]

Falling ST2S06A Rising ST2S06A Falling ST2S06D Rising ST2S06D

75

100

125

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ST2S06 description Figure 13. TDEL vs. temperature
100 95 90 85 80 75 70 65 60 55 50 -50

AN2681

T DEL (ms)

ST2S06A ST2S06D -25 0 25 50
T [C]

75

100

125

1.3

Short-circuit protection
In overcurrent protection mode, when the peak current reaches the current limit, the device reduces Ton to its minimum value. In these conditions, the duty cycle is strongly reduced and, in most of the applications, this is enough to limit the current to Ilim. In case of heavy short-circuit at the output (Vout=0 V) and depending on the application conditions (Vin value and parasitic effect of external components), the current peak could reach values higher than Ilim. This can be understood considering the inductor current ripple during the ON and OFF phases: Equation 1
ON phase ( Vi n Vo u t D C RL I ) I L = ---------------------------------------------------------- T o n L

Equation 2
OFF phase ( VD + Vo u t + D C RL I ) I L = ---------------------------------------------------------- T o f f L

Where VD is the voltage drop across the internal NMOS and DCRL is the series resistance of the inductor. In short-circuit conditions Vout is negligible. So, during Toff, the voltage applied to the inductor is very small and it can be that the current ripple in this phase does not compensate for the current ripple during Ton. The maximum current peak can be easily measured through the inductor with Vout = 0 V (short-circuit) and Vin=Vinmax. In case the application has to sustain the short-circuit condition for a long time, the external components (mainly inductor) must be selected based on this value.

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AN2681

Selecting components for applications

2

Selecting components for applications
This section provides information to assist in the selection of the most appropriate components for your applications. Figure 14 shows the typical application schematic. Figure 14. Typical application schematic

* ST2S06B ** ST2S06A/D

2.1

Output voltage selection
The output voltage can be adjusted from 0.8 V up to 85% of input voltage value by connecting a resistor divider between the output and the VFB pin. You must choose the resistor divider according to the following equation: Equation 3
R1 V o u t = V F B 1 + -----R2
with V F B =0.8 V

Figure 13 shows the feedback voltage versus temperature. We suggest using a resistor with a value in the range of 10 k to 50 k. Lower values are suitable as well, but will increase current consumption. Be aware that the duty cycle must be kept below 85% at all application conditions, so that: Equation 4
Vo u t + VF D M A X = ----------------------------------- < 0.85 Vi n M I N VS W

where VF is the voltage drop across the internal NMOS, and VSW represents the voltage drop across the internal PMOS.
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Selecting components for applications

AN2681

For output voltages close to the feedback voltage, we suggest adding a very small capacitor in parallel to R1 in the range of 10 pF. Or, as an alternative, we suggest increasing the current in the resistor divider by decreasing the R1 and R2 value. Figure 15. Feedback voltage vs. temperature
0.84 0.83 0.82 0.81 0.8 0.79 0.78 0.77 0.76 -50

Vfb [V]

Vin=5V, Iout1,2=No load

Vfb1 25 50 75

Vfb2 100 125

-25

0

TEMPERATURE [C]

2.2

Input capacitor
The input capacitor must be able to support the maximum input operating voltage and the maximum RMS input current. Since step-down converters draw current from the input impulses, the input current is squared and the height of each pulse is equal to the output current. The input capacitor has to absorb all this switching current that can be up to one half of the load current (worst case, with duty cycle of 50%). For this reason, the quality of these capacitors has to be very high to minimize its power dissipation generated by the internal ESR, thus improving the system reliability and efficiency. The critical parameter is usually the RMS current rating, which must be higher than the RMS input current. The maximum RMS input current (flowing through the input capacitor) is: Equation 5
2 - ---- ---I R M S = I o u t D -------D-- + D-
2 2

Where is the expected system efficiency, D is the duty cycle, and Iout the output DC current. This function reaches its maximum value at D = 0.5 and the equivalent RMS current is equal to Iout divided by 2 (considering = 1). The maximum and minimum duty cycles are: Equation 6
Vo u t + VF D M A X = ----------------------------------Vi n M I N VS W

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AN2681 Equation 7

Selecting components for applications

Vo u t + VF D M I N = -----------------------------------Vi n M A X VS W

Where VF it is the voltage drop across the internal NMOS and VSW the voltage drop across the internal PMOS. Considering the range DMIN to DMAX it is possible to determine the max IRMS flowing through the input capacitor. The use of ceramic capacitors with voltage ratings in the range of 1.5 times the maximum output voltage is recommended.

2.3

Output capacitor
The output capacitor is very important to satisfy the output voltage ripple requirement. Using a small inductor value is useful to reduce the size of the coil, but increases the current ripple. So, to reduce the output voltage ripple a low ESR capacitor is required. The output voltage ripple (VOUT_RIPPLE), in continuous mode, is: Equation 8
1 V o u t R I P P L E = I E S R + ----------------------------------- 8 C o u t F S W

where I is the ripple current and FSW is the switching frequency. The use of ceramic capacitors with voltage ratings in the range of 1.5 times the maximum output voltage is recommended.

2.4

Inductor
The inductor value is very important because it fixes the ripple current flowing through the output capacitor. The ripple current is usually fixed at 20-40% of Iout_max, that is 0.1-0.2 A with Iout_max = 0.5 A. The inductor value is approximately obtained by the following formula: Equation 9
Vi n Vo u t L = ------------------------ T o n I

where Ton is the ON time of the internal switch, given by D · T. The peak current through the inductor is given by: Equation 10
I I P K = I o u t + ---2

And it can be seen that if the inductor value decreases, the peak current (that has to be lower than the current limit of the device) increases. So, for fixed peak current protection, a higher value of the inductor permits a higher value for the output current.

13/23

Selecting components for applications

AN2681

2.5

Layout considerations
Due to the high switching frequency and peak current, the layout is an important design step for all switching power supplies. If the layout is not carefully done, important parameters such as efficiency and output voltage ripple could be compromised. Shor t, wide traces must be implemented for main current and for power ground paths as shown in bold in Figure 16. The input capacitors must be placed as close as possible to the device pins as well as the inductors and output capacitors. A common ground node minimizes ground noise, as shown in Figure 16. HV pin must be floating or connected to GND and the exposed pad of the package must be connected to GND. Figure 16. Layout considerations

* ST2S06B ** ST2S06A/D

14/23

AN2681

Thermal considerations

3

Thermal considerations
The dissipated power of the device is determined by three different factors:

Switch losses due to the nonnegligible RDS(on). These are equal to:

Equation 11
PO N P = RD S ( o n ) P I
2 out

D

and Equation 12
PO N N = RD S ( o n ) N I
2 out

( 1 D )

where D is the duty cycle of the application. Note: The duty cycle is theoretically given by the ratio between Vout and Vin, but in practice is quite higher than this value in order to compensate the losses of the overall application. Due to this reason, the switch losses related to the RDS(on) increase compared to the ideal case.

On and Off switching losses. These are given by the following relationship:

Equation 13
( To n + To f f ) P S W = V i n I o u t ----------------------------- F S W = V i n I o u t T S W F S W 2

where TON and TOFF are the overlap times of the voltage across the power switch and the current flowing into it during the turn-on and turn-off phases. TSW is the equivalent switching time.

Quiescent current losses:

Equation 14
PQ = Vi n IQ

where IQ is the quiescent current. The overall losses are: Equation 15
For channel 1 PC H 1 = RD S ( o n ) P 1 I
2 out1

D1 + RD S ( o n ) N 1 I
-

2

out1

( 1 D1 ) + Vi n Io u t 1 TS W 1 FS W 1

Equation 16
For channel 2 PC H 2 = RD S ( o n ) P 2 I
2 out2

D2 + RD S ( o n ) N 2 I
-

2

out2

( 1 D2 ) + Vi n Io u t 2 TS W 2 FS W 2

Equation 17
PT O T = PC H 1 + PC H 2 + Vi n IQ

15/23

Demonstration board usage recommendation The junction temperature of device is: Equation 18
TJ = TA + R t hJ A PT O T

AN2681

where TA is the ambient temperature and RthJ-A is the thermal resistance junction to ambient.

4

Demonstration board usage recommendation
The demonstration board shown in Figure 17 is provided with a Kelvin connection which means that for each pin there are two lines available, one used to supply or sink current and the other one used to perform the needed measurement. Figure 17. Demonstration board layout
GND Force Vin Sense Vin Force Inhibit Reset Out

Vout2 Sense Vout2 Force GND Sense GND Sense

Vout1 Sense Vout1 Force

16/23

AN2681

Demonstration board usage recommendation Figure 18. Demonstration board - top layer

Figure 19. Demonstration board - bottom layer

The board has one inhibit pin available which is located on the top side of the board. This pin can be used to supply the inhibit pin with an external voltage higher than 1.3 V to turn on, or lower than 0.4 V to turn off the device.

17/23

Demonstration board usage recommendation

AN2681

4.1

External component selection
Figure 19 and 20 show the demonstration board schematic. Figure 20. Demonstration board schematic for ST2S06A\D

Figure 21. Demonstration board schematic for ST2S06B

In order to obtain the needed output voltage, the resistor divider must be selected in accordance with the following formula: Equation 19
R 1, 3 V O U T 1, 2 = V F B 1, 2 1 + ----------R 2, 4

with VFB1,2 = 0.8 V Table 1. Recommended resistor divider
VOUT1,2 1.2 V 3.3 V R1,3 27 k 47 k R2,4 47 k 15 k

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AN2681

Demonstration board usage recommendation The resistors dividers in Table 1 are a good compromise in terms of current consumption and minimum output voltage.

Note:

If ST2S06A33 or ST2S06D33 are mounted in the demonstration board, R1 is replaced with a short-circuit and R2 is not used.

4.1.1

Capacitors selection
It is possible to use any X5R or X7R ceramic capacitor

Ci_A = Ci_SW = 4.7 F (ceramic) or higher. Co1 = Co2 = 22 F (ceramic) or higher. It is possible to put several capacitors in parallel in order to reduce the equivalent series resistance and improve the ripple present in the output voltage.

4.1.2

Inductor selection
Due to the high frequency (1.5 MHz) it is possible to use very small inductors values. In our board the device was tested with inductors in the range of 1 H to 10 H, with very good efficiency performances (see below plot in Figure 22). As the device is able to provide an operative output current of 0.5 A, the use of inductors capable of managing at least 1.5 A is strongly recommended. Figure 22. Efficiency vs. output current
100 90 80

Efficiency [%]

70 60 50 40 30 20 10 0 0 50 100 150 200 250 300 350
Vin=5V, L1=L2=3.3H, Ci_A = Ci_SW=4.7F, Co1=Co2=22F

Vout=1.2V Vout=2.5V Vout=3.3V
400 450 500

Iout [mA]

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Demonstration board usage recommendation Figure 23. Efficiency vs. inductor

AN2681

100 90
Efficiency [%]

80 70 60 50 40 30 0 2 4 6 L [H] 8 10
Vin=5V, Vout=3.3V, Ci_A = Ci_SW =4.7F, Co1=Co2=22F

Iout=100mA Iout=300mA Iout=500mA

Figure 24. Efficiency vs. output voltage

100 95 90 85 80 75 70 65 60 55 50 0.5 1

Efficiency [%]

Vin=5V, L1=L2=3.3H, Ci_A = Ci_SW =4.7F, Co1=Co2=22F

Iout=300mA Iout=500mA

1.5

2 2.5 Vout [V]

3

3.5

4

Note:

All efficiencies are relative to one channel, the other channel is at no-load.

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AN2681

Bill of materials

5

Bill of materials
Table 2.
Name Ci_A

BOM with most common components
Value 4.7 F Ceramic Ceramic TDK Murata TDK Murata TDK Murata TDK TDK C3216X7R1C475K GRM21BR61E475KA12B C3216X7R1C475K GRM32ER61E226KE15B C3225X7R1C226M GRM32ER61E226KE15B C3225X7R1C226M RLF7030T-3R3M4R1 LQH66SN3R3M03L DR73-3R3 RLF7030T-3R3M4R1 LQH66SN3R3M03L DR73-3R3 Material Ceramic Manufacturer Murata P/N GRM21BR61E475KA12B

Ci_SW

4.7 F Ceramic Ceramic

Co1

22 F Ceramic Ceramic

Co2

22 F Ceramic

L1

3.3 H

Murata Coiltronics TDK

L2

3.3 H

Murata Coiltronics

Rpi/Rpo

120 k

21/23

Recommended footprint

AN2681

6

Recommended footprint
Figure 25. QFN12L (4x4 mm) footprint recommended data

7

Revision history
Table 3.
Date 08-Jan-2008 15-Sep-2008

Document revision history
Revision 1 2 Initial release Changed: Figure 22, 24 Changes

22/23

AN2681

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