AN2744 Application note
ST7538Q power line FSK transceiver dual channel reference design for AMR
Introduction
The ST7538Q dual channel reference design is a practical tool to start the activity of designing an automatic meter reading (AMR) node based on the ST7538Q power line FSK transceiver. With this reference design, it is possible to evaluate the features of the ST7538Q and its transmitting and receiving performances in an actual communication on the power line network. The ST7538Q reference design can be considered as composed of three main sections:
power supply section, specifically designed to coexist with power line communication and to operate from a wide-range input mains voltage modem and crystal oscillator section dual channel line coupling interface section
The dual channel line coupling interface allows the ST7538Q FSK transceiver to transmit and receive on the mains using two different carrier frequencies: 72 kHz and 86 kHz, both within the frequency band A specified by the European CENELEC EN50065 standard for AMR applications. Figure 1. ST7538Q dual channel reference design board with outline dimensions
56mm
98mm
As it can be seen from the picture above, a special effort has been made to develop a compact reference design board, oriented to practical applications. Note: The information provided in this application note refers to the EVALST7538DUAL reference design board.
Rev 1 1/56
www.st.com 56
April 2008
Contents
AN2744
Contents
1 2 3 4 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Safety precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ST7538Q FSK power line transceiver description . . . . . . . . . . . . . . . . 10 Evaluation tools description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 Line coupling interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 Dual channel selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Dual channel Tx passive filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Dual channel Rx passive filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Dual channel Rx active filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2
Conducted disturbances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.2.1 5.2.2 Conducted emissions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Noise immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.3 5.4 5.5 5.6 5.7
Thermal design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Oscillator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Surge and burst protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 50-pin connector for communication board . . . . . . . . . . . . . . . . . . . . . . . 40 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6 7
Performance and ping tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
7.1 7.2 7.3 Three-phase architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Received signal strength indication (RSSI) . . . . . . . . . . . . . . . . . . . . . . . 47 110-132.5 kHz dual channel coupling circuit . . . . . . . . . . . . . . . . . . . . . . 49
8 9
Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 List of normative references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
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Contents
Appendix A Board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
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List of figures
AN2744
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36.
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ST7538Q dual channel reference design board with outline dimensions . . . . . . . . . . . . . . . 1 Typical curve for output current limit vs. RCL value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ST7538Q transceiver block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Complete evaluation system including a PC, an EVALCOMMBOARD and the EVALST7538DUAL board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power line modem demonstration kit with transmission session window . . . . . . . . . . . . . . 13 Scheme of the various sections of the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Modem and coupling interface schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power supply schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Schematic of Rx and Tx filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Measured frequency response of the Tx passive filter for 72 kHz channel (typical). . . . . . 22 Measured frequency response of the Tx passive filter for 86 kHz channel (typical). . . . . . 23 Simulated frequency response of the Tx passive filter for 72 kHz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Simulated frequency response of the Tx passive filter for 86 kHz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Measured frequency response of the Rx passive filter for 72 kHz channel (typical) . . . . . 25 Measured frequency response of the Rx passive filter for 86 kHz channel (typical) . . . . . 26 Simulated frequency response of the Rx passive filter for 72 kHz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Simulated frequency response of the Rx passive filter for 86 kHz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Measured frequency response of the Rx active filter for 72 kHz channel (typical) . . . . . . . 27 Measured frequency response of the Rx active filter for 86 kHz channel (typical) . . . . . . . 28 Simulated frequency response of the Rx active filter for 72 kHz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Simulated frequency response of the Rx active filter for 86 kHz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Measured input impedance magnitude of the coupling interface in Rx mode for the 72 kHz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Measured input impedance magnitude of the coupling interface in Rx mode for the 86 kHz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Measured input impedance magnitude of the coupling interface in Tx mode for the 72 kHz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Measured input impedance magnitude of the coupling interface in Tx mode for the 86 kHz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Conducted disturbance test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Output spectrum (typical) at 72 kHz channel, mains 220 VAC, fixed transmitted tone = "1" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Output spectrum (typical) at 86 kHz channel, mains 220 VAC, fixed transmitted tone = "1" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Narrowband conducted interference test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Measured BER vs. SNR curve (typical), white noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Measured SNR vs. frequency curves (typical) at BER=10-3 - 72 kHz channel . . . . . . . . . 35 Measured SNR vs. frequency curves (typical) at BER=10-3 - 86 kHz channel . . . . . . . . . 35 PCB copper dissipating area for the ST7538Q dual channel reference design . . . . . . . . . 36 Packet-fragmented transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Thermal impedance typical curve for the ST7538Q mounted on the reference design board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 A recommended oscillator section layout for noise shielding . . . . . . . . . . . . . . . . . . . . . . . 38
AN2744 Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51.
List of figures Common mode disturbances protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Differential mode disturbances protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Scheme of the communication board connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Typical waveforms at 230 VAC: open load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Typical waveforms at 230 VAC: full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Typical waveforms at 265 VAC: short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Typical waveforms at 265 VAC: startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 SMPS efficiency curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Demonstration software window for the master board . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Scheme of principle for three-phase architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Peak detector electrical schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Measured DC_OUT vs. AC_IN peak detector performance . . . . . . . . . . . . . . . . . . . . . . . . 48 PCB layout - top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 PCB layout - bottom view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
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List of tables
AN2744
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Electrical characteristics of the ST7538Q dual channel reference design . . . . . . . . . . . . . . 7 Output signal level setting through VSENSE partitioning - typical values . . . . . . . . . . . . . . . . 8 Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 ST parts on the ST7538Q dual channel reference design board . . . . . . . . . . . . . . . . . . . . 19 Line coupling transformer specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Noise immunity test settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 50-pin connector digital signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 50-pin connector control signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 50-pin connector power connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 SMPS specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 SMPS transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 List of components to be modified for the 110-132.5 kHz dual channel coupling. . . . . . . . 49 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
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AN2744
Electrical characteristics
1
Table 1.
Electrical characteristics
Electrical characteristics of the ST7538Q dual channel reference design
Parameter Min. Value Typ. Max. Notes
Operating condition Ambient operating temperature Transceiver section Selectable channel frequencies: 72 kHz (CH1), 86 kHz (CH2) Transmitting specifications (Tx Mode) Transmitting output voltage level Transmitting output current limit Second harmonic distortion Third harmonic distortion 50 Hz attenuation Receiving specifications (Rx Mode) Minimum detectable Rx signal Auxiliary supply 5 V linear regulator (VDC) output voltage 5 V linear regulator (VDC) current capability Power supply section AC mains voltage range Mains frequency Output voltage Output voltage ripple Output current Output power Efficiency at POUT = 3.5 W Nominal transformer isolation(1) Number of holdup cycles 70% 4 kV Primary to secondary/ secondary to auxiliary -10% 85 V 50-60 Hz 10 V +10% 1% 600 mA 5.6 W Green LED ON 265 V -5% 5.05 V +5% 100 mA ST7538Q internally generated 53 dB/VRMS BER<10-3, negligible noise 100 dB 2 VRMS 325 mARMS -55 dB -61 dB 2.25 VRMS R20 = 3.9 k, R22=2.2 k see Table 2 R19 = 2 k see Figure 2 Loaded with CISPR 16-1 network Loaded with CISPR 16-1 network 85 C If junction temperature exceeds 180 C the device shuts down
IOUT = 600 mA, VIN=85 VAC
0
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Electrical characteristics Table 1.
AN2744
Electrical characteristics of the ST7538Q dual channel reference design (continued)
Parameter Value 100 mW -10% 60 kHz +10% Transceiver section in Tx mode Notes
Input power Switching frequency
1. ST does not guarantee transformer isolation. ST assumes no responsibility for the consequences that may result from that risk.
Table 2.
Output signal level setting through VSENSE partitioning - typical values
VOUT [dBuVRMS] 120 121 122 124 125 126 127 128 130 (R7 + R8) / R8 1.25 1.4 1.6 2.0 2.25 2.5 2.8 3.15 4.0 R7 [k] 0.910 1.3 2.2 2.7 3.3 3.9 4.7 6.8 7.5 R8 [k] 2.2 2.2 2.2 2.2 2.2 2.2 2.2 2.2 2.2
VOUT [VRMS] 1.000 1.125 1.250 1.500 1.800 2.000 2.250 (Note 1) 2.500 (Note 1) 3.000 (Note 1)
Note:
1
EN50065-1 normative compliance is not guaranteed with a signal level at mains output greater than 2 VRMS
Figure 2.
Typical curve for output current limit vs. RCL value
400 350 300 I rm s (mA) 250 200 150 100 100 1. 75
2
2. 25
2. 5
2. 75
3
3. 25
3. 5
3.75
4
4. 25
4.5
4. 75
5
Rcl (kOhm)
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AN2744
Safety precautions
2
Safety precautions
The board must be used only by expert technicians. Due to the high voltage (220 V ac) present on the parts which are not isolated, special care should be taken with regard to people's safety. There is no protection against high voltage accidental human contact. After disconnection of the board from the mains, none of the live parts should be touched immediately because of the energized capacitors. It is mandatory to use a mains insulation transformer to perform any tests on the high voltage sections (see circuit sections highlighted in Figure 7 and Figure 8) in which test instruments like spectrum analyzers or oscilloscopes are used. Do not connect any oscilloscope probes to high voltage sections in order to avoid damaging instruments and demonstration tools.
Warning:
ST assumes no responsibility for any consequences which may result from the improper use of this tool.
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ST7538Q FSK power line transceiver description
AN2744
3
ST7538Q FSK power line transceiver description
The ST7538Q transceiver performs a half-duplex communication over the power line network using frequency shift keying (FSK) modulation. It operates from a 7.5 to 12.5 V single supply voltage (PAVCC) and integrates a differential-output power line interface (PLI) stage and two linear regulators providing 5 V (VDC) and 3.3 V (DVDD).
Figure 3.
ST7538Q transceiver block diagram
The ST7538Q can be programmed to communicate using eight different frequency channels (60, 66, 72, 76, 82.05, 86, 110 and 132.5 kHz), four baud rates (600, 1200, 2400 and 4800 symbols per second) and two frequency deviations (1 and 0.5). Many auxiliary functions are integrated. The transmission section includes automatic control on PLI output voltage and current, programmable time-out function and thermal shutdown. The reception section includes automatic input level control, carrier/preamble detection and band-in-use signaling. Additional features are included, such as watchdog timer, zero-crossing detector, internal oscillator and a general purpose op-amp. The serial interface (configurable as UART or SPI) allows interfacing to a host microcontroller, intended to manage the communication protocol. A reset output (RSTO) and a programmable 4-8-16 MHz clock (MCLK) can be provided to the microcontroller to simplify the application. Communication on the power line can be either synchronous or asynchronous with the data clock (CLR/T) provided by the transceiver at the programmed baud rate. When in transmission mode (i.e. RxTx line at low level), the ST7538Q transceiver samples the data on the TxD line, generating an FSK modulated signal on the ATO pin. The same
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AN2744
ST7538Q FSK power line transceiver description signal is fed into the differential power amplifier to get four times the voltage swing and a current capability up to 370 mA rms. When in reception mode (i.e. RxTx line at high level), an incoming signal at the RAI line is demodulated and converted to a digital bit stream on the RxD pin. The internal control register, which contains the operating parameters of the ST7538Q transceiver, can be programmed only using the SPI interface. The control register settings include the header recognition and frame length count functions, which can be used to apply byte and frame synchronization to the received messages.
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Evaluation tools description
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4
Evaluation tools description
The complete evaluation environment for the ST7538Q power line communication consists of: 1 PC using the "ST7538 power line modem demonstration kit" software tool 1 EVALCOMMBOARD hosting an ST7 microcontroller 1 ST7538Q dual channel reference design board (EVALST7538DUAL) The correct procedure for connecting the EVALST7538DUAL and the EVALCOMMBOARD is as follows: 1. 2. 3. 4. Connect the EVALST7538DUAL and the EVALCOMMBOARD together Connect the ac cable to the EVALST7538DUAL and the USB cable to the EVALCOMMBOARD Connect the EVALST7538DUAL to the mains supply Connect the EVALCOMMBOARD to the PC via USB cable
Warning:
Follow the connection procedure to avoid damaging the boards!
Figure 4.
Complete evaluation system including a PC, an EVALCOMMBOARD and the EVALST7538DUAL board
USB/RS232 USB/RS232
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AN2744
Evaluation tools description
Figure 5.
Power line modem demonstration kit with transmission session window
This complete communication node, controlled by the ST7538Q power line modem demonstration kit, implements real communication at bit level, simply sending or receiving a user-defined bit stream. It is possible to establish a half-duplex communication between two of these communication nodes connected to each other. For better evaluating communication performances, the ST7538Q power line modem demo kit software tool has some particular features, including:
Frame synchronization: a frame synchronization header can be added to the transmitted data to set up a simple protocol, intended to test the capability of the system to correctly receive the exact bit sequence as it has been transmitted. This feature can be enabled in the Rx panel of the ST7538Q power line modem demonstration kit. A bit synchronization can be introduced as a simpler feature by enabling the preamble detection method in the control register panel and then inserting at least one "0101" or "1010" sequence at the beginning of the bit stream to be transmitted. Ping session: a master-slave communication with automatic statistics calculation can be useful to test a point-to-point or a point-to-multipoint power line communication network, thus providing a method to evaluate reachability of each node in the network.
For further details about the ST7538Q power line modem demonstration kit tool, please refer to user manual UM0241 "ST7538 power line modem demonstration kit graphical user interface".
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Board description
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5
Board description
The ST7538Q dual channel reference design is composed of the following sections: power supply section, based on ST's VIPer12A-E IC ST7538Q modem and crystal oscillator section line coupling interface section, with three subsections: dual channel transmission passive filter dual channel reception passive filter dual channel reception active filter
The board has also two connectors, which allow the user to plug the mains supply on one side of the board and the IBU communication board on the other side. Figure 6. Scheme of the various sections of the board
Duall Channel Dua Channel RX Active Filter RX Active Filter
Power Supply Power Supply ((wiitth ST Viper 12A) w h ST Viper 12A)
Connection to C Board Connection to C Board Connection to C Board Connection to C Board
Connection Connection to Mains Mains Supply
Duall Channel Dua Channel TX Passive TX Passive TX Filter Filter Filter
ST7538Q ST7538Q ST7538Q Modem Modem Secttiion Sec on
Duall Channel Dua Channel RX Passive Filter RX Passive Filter
The schematics of the whole reference design are given in the following pages. Figure 7 shows the modem and coupling interface circuits, while Figure 8 represents the power supply circuit. In both schematics, high voltage regions are highlighted. Table 3 lists the components used to develop the reference design board. All parts have been selected to give optimal performances. The layout of the printed circuit is shown in Appendix A - Figure 50 and Figure 51.
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AN2744
Board description
Figure 7.
Modem and coupling interface schematic
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Board description
AN2744
Figure 8.
Power supply schematic
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HIGH VOLTAGE SECTION
AN2744 Table 3.
Item Q.ty
Board description Bill of materials
Reference ATOP1, ATOP2, P5 V, 10 V, VADJ, TX, RXTX, RXFO, RX, RAI, GND, CLRT, CL, CD/PD, BU, ATO CN1 CN2 C1 C2 C3 C4 C5,C10 C6 C8 C9,C17,C21 C11,C12 C13,C15,C18,C19,C24 C14,C26 C16 C20 C22 C23 C25 C27 C28 C29 C30 D1 D2 D3 D4 D5 D6 D7 D9 F1 Value Description
1
16
Test point
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1 1 1 1 1 1 2 1 1 3 2 5 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CON50A Header 2 470 pF 630 V 47 nF X2 470 F 16 V electrolytic 100 F 16 V 10 F 400 V electrolytic 2.2 nF Y2 47 nF 10 F 270 pF 100 nF 10 nF 4.7 nF 10 nF 18 pF 47 pF 100 pF 56 nF 50 V 100 nF X2 10% 150 nF 220 pF DF06S Green LED STPS1H100 STTH1L06A BAS16 2L SM6T6V8CA ESDA6V1L BZX84C8V2 FUSE
50-pin female connector Mains supply connector EVOX-RIFA PFR5-471J630L4 Epcos B32921-A2473K Rubycon YK / Yageo SE-K / Nichicon VK TDK CKG57DX7R-1C107M Yageo SE-K / Nichicon VK TDK CD12E2GA222MYNS
TDK C3216X7R-1C106M
Epcos B32922-A2104K
600 V - 1.5 A bridge rectifier
BAS21 also suitable 6.8 V bidirectional TransilTM diode 6.1 V ESD TransilTM diode 8.2 V Zener diode 2 A time-lag (T)
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Board description Table 3.
Item Qty 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 1 2 1 1 1 1 1 1 1 1 2 1 1 1 1 1 2 1 1 1 1 3 2 1 1 1 1 1 1 1 1 1 1 1 1
AN2744
Bill of materials (continued)
Reference JP1 JP2, JP3 L1 L2 L3 L4 L5 L6 L7 L8 Q2, Q4 Q3 R1 R2 R3 R6 R8, R18 R9 R10 R11 R12 R13, R14, R15 R16, R17 R19 R20 R21 R22 R23 T1 T2 U1 U2 U3 U6 X1 Value Jumper Jumper 33 H 2x10 mH - 0.3 A 470 H 1 mH 100 H 10% 68 H 10% 330 H 10% 10 H 2N7002 BC857BL 220 k 1K5 10R 1 W 560 330 1K2 100 k 4K7 680 5K1 1M 2 k 3K9 3R3 2K2 10 k SMPS transformer TDK SRW12.6ES-ExxH013 / Würth S06-100-057 Line transformer SFH610-A LCA710 ST7538Q VIPer12AS-E 16 Mhz VAC T60403-K5024-X044 / Radiohm 69H14-2101 Optoswitch Optoswitch - 3750 V isolation Power line transceiver SMPS controller / switch Jauch Q 16.0-SS2-16-30/50-FU Metal oxide - radial Leave open Close 2-3 Epcos B82462-A4333K Radiohm 42V15-0307 Epcos B82442-A1474K Epcos B82442-H1105K Wür th 744-775-210K / Epcos B82464-A4104K Wür th 744-775-168K / Epcos B82464-A4683K Wür th 744-774-233K Epcos B82432-T1103K Description
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AN2744 Table 4. ST parts on the ST7538Q dual channel reference design board
Value ST7538Q VIPer12AS-E STTH1L06A STPS1H100 SM6T6V8CA ESDA6V1L Description
Board description
Power line transceiver SMPS controller / switch Ultrafast diode Schottky diode 6.8 V bidirectional TransilTM diode 6.1 V ESD TransilTM diode
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Board description
AN2744
5.1
Line coupling interface
The line coupling interface is composed of three different filters: the dual channel Tx passive filter, the dual channel Rx passive filter and the dual channel Rx active filter. The coupling interface structure is represented in Figure 9.
Figure 9.
Schematic of Rx and Tx filters
C29 150 nF ATOP1 ACT_IN 1 3 2 ESDA6V1L 1 JP2 CLOSE 2-3 3 1 JP3 CLOSE 2-3 2 3 R18 330 T2 4 5 L6 68 uH D6 SM6T6V8CA C27 56 nF R16 1M
Tx Tx PASSIVE FILTER
N
D7
2 C20 10nF C16 4.7nF 1 L7 330uH 8
R21 3.3
R17 1M
P C28 100nF X2
LINE TRANSFORMER L5 100 uH 6
ATOP2 3
C14 10 nF RAI
Q4 2N7002 2
4 U2 LCA710 2
1
NEG_CH2 1 R8 330 CH2
JP1
Rx PASSIVE FILTER
5V R15 5K1 CPLUS C15 100nF R14 5K1 CMINUS C11 270pF R13 5K1 ACT_IN R9 1K2 Q2 2N7002 CH2 1 2 R12 680 3
LEAVE OPENED
COUT
R10 100K
C12 270pF
Rx ACTIVE FILTER
All three filters are described in Section 5.1.2, Section 5.1.3 and Section 5.1.3. For each filter, calculations and measured frequency responses are given. The filters are quite sensitive to the components' value tolerance. Actual components used in the ST7538Q dual channel reference design have the following tolerances:
+/- 10% for coils and for the X2 capacitor +/- 1% for SMD resistors +/- 5% for SMD ceramic capacitors
To evaluate sensitivity to the tolerances indicated above, the following sections include simulated responses of the filters with Montecarlo statistical analysis. Statistical simulation helps to understand the relationship between tolerance of components' value and variations
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AN2744
Board description on frequency response of the filters. In simulation curves, the ideal response is drawn in blue, while red curves indicate statistical variations generated through simulation.
5.1.1
Dual channel selection
To obtain a dual channel interface, each filter is tunable via software command. The ST7538Q dual channel reference design has two available channel frequencies, 72 and 86 kHz. The channel can be simply changed by including or excluding one passive component per each filter: an inductor for the Tx filter, a capacitor for the Rx passive filter and a resistor for the Rx active filter.
5.1.2
Dual channel Tx passive filter
The dual channel Tx passive filter is made of the following parts: DC-decoupling capacitor C29, line transformer T2, inductors L5 and L6 and X2 safety capacitor C28, plus a shunt branch made of R21 and C27. The center frequency for the series resonance is calculated with good approximation as: Equation 1
fC =
1 2 LP CP
where CP = C29(C27+C28)/(C27+C28+C29) and LP is equal to: L6 for 72 kHz channel, L6 // L5 for 86 kHz channel. To guarantee adequate filtering action on signal harmonics, it is required to set the center frequency at a value lower than the one of the channel frequency. See Figure 10 and Figure 11 to check the resulting measured frequency response. L5 and L6 have been accurately chosen to have high saturation current (> 1 A) and low equivalent series resistance (< 0.5 ), to limit distortion and insertion losses. R21 is intended to damp resonance, to better control filtering action and getting desired rejection on transmitted signal harmonics. Resonance shape is also affected by the ratio between the two capacitors C27 and C28. C27 must be smaller than C28 (in this case, about half the value of C28) to get lower insertion losses when the line impedance is very low. To optimize the coupling efficiency, particular attention must be paid to the line transformer. The required characteristics are listed in Table 5. In order to have a good power transfer and to minimize the insertion losses, it's recommended to choose a transformer with a primary (magnetizing) inductance greater than 1mH and a series resistance lower than 0.5 . Another important parameter is the leakage inductance. If it has a relevant value (10 to 50 H), this can be used to design the coupling filter without adding series inductance (L5, L6). The drawback is that this parameter is usually affected by poor accuracy which can lead to a drift on the filter response and then to bad coupling. Consequently, a low leakage inductance value (<1 H) has been chosen. The series inductance is fixed through discrete components, resulting in a greater accuracy. The last parameter specified in the table, the 4 kV insulation voltage requirement, is described and codified by the EN50065-4-2 CENELEC document.
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Board description Table 5. Line coupling transformer specifications
Parameter Turn Ratio Magnetizing Inductance Leakage Inductance DC total resistance DC saturation current Interwinding capacitance Withstanding Voltage Value 1:1 > 1 mH < 1 H < 0.5 > 2 mA < 50 pF 4 kV
AN2744
Figure 10 and Figure 11 show the measured response of the filter for both channels, loaded with the CISPR reference network and with 5 impedance. When loaded with the CISPR network, the Tx passive filter gives an almost flat gain of nearly 3.5 dB around the transmission carrier frequency. Applying a heavier load makes the frequency response sharper and the gain at carrier frequency lower. This effect leads to a loss of about 7-8 dB with a 5 load for both channels. Figure 10. Measured frequency response of the Tx passive filter for 72 kHz channel (typical)
10 5 0 -5
CISPR 5 load
Gain (dB)
-10 -15 -20 -25 -30 -35 -40 -40 1E+04
1E+05
1E+06
Freq (Hz)
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AN2744
Board description
Figure 11. Measured frequency response of the Tx passive filter for 86 kHz channel (typical)
10 5 0 -5
CISPR 5 load
Gain (dB)
-10 -15 -20 -25 -30 -35 -40 -40 1E+04
1E+05
1E+06
Freq (Hz)
Simulations of the filter for both frequency channels, given in Figure 12 and Figure 13, show limited effect by the components' tolerance.
Figure 12. Simulated frequency response of the Tx passive filter for 72 kHz channel with tolerance effect
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40 1E4 1E5 1E6
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Board description
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Figure 13. Simulated frequency response of the Tx passive filter for 86 kHz channel with tolerance effect
10
5
0
-5
-10
-15
T
-20
-25
-30
-35
-40 1E4 1E5 1E6
5.1.3
Dual channel Rx passive filter
The dual channel Rx passive filter is made of a resistor in series with a parallel L-C resonant circuit. The transfer function of the filter can be written as:
Equation 2
s L 7 + RL R18 L 7 CP R(s) = R R C + L7 R18 + RL s 2 + 18 L P s + R18 L 7 CP R18 L 7 CP
where RL is the dc series resistance of the inductor L7 (in the worst case, 2 ) and CP is the equivalent capacitance for the two channels: C16 + C20 for 72 kHz, only C20 for 86 kHz. The center frequency and the quality factor of the filter can be expressed as:
Equation 3
fc =
R18 + RL 1 1 1 C = 2 2 R18 L 7 CP 2 L 7 CP
The simplification done in Equation 3 is possible because R18 >> RL. It's evident that the quality factor, and then the filter selectivity, depends not only on the value of R18, but also on RL. A higher RL means a lower steepness of the resonance, while a higher R18 gives a
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AN2744
Board description
higher selectivity. The values of the actual components give a Q of about 2.2 for the 72 kHz channel and 1.8 for the 86 kHz channel. The value of RL impacts more obviously on insertion losses. To evaluate the relationship between RL and the losses on received signal, the following simplified expression of |R(s)| at f = fc can be used:
Equation 4
R( j 2fC ) Q
C L 7 = R18
1 1 + RL R18 CP L7
With the chosen components, this formula gives a loss always lower than 1 dB. The same calculation gives unitary transfer if RL is set to zero. Looking at the first way to express the module of the transfer function, it can be noticed that a higher Q can help to keep the losses small. A high Q would bring to a higher sensitivity of the filter to tolerance of the components.
Figure 14 and Figure 15 show the measured frequency response of the Rx passive filter for the two channels. The filter has an attenuation of about 5 dB at center frequency. This loss is mostly due to the Tx filter topology, in particular to the R21-C27 branch that is in parallel to the Rx path. Figure 14. Measured frequency response of the Rx passive filter for 72 kHz channel (typical)
-2 -3 -4 -5 -6 -7
Gain (dB)
-8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -18 1E+04 1E+05 1E+06
Freq (Hz)
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Board description
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Figure 15. Measured frequency response of the Rx passive filter for 86 kHz channel (typical)
-2 -3 -4 -5 -6 -7
Gain (dB)
-8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -18 1E+04 1E+05 1E+06
Freq (Hz)
It can be observed from the simulation curves of Figure 16 and Figure 17 a maximum loss at center frequency of 1 dB due to the spread of the components' value.
Figure 16. Simulated frequency response of the Rx passive filter for 72 kHz channel with tolerance effect
0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 1E4 1E5 1E5 1E6
1 dB
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AN2744
Board description
Figure 17. Simulated frequency response of the Rx passive filter for 86 kHz channel with tolerance effect
0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 1E4 1E5 1E5 1E6
1 dB
5.1.4
Dual channel Rx active filter
An active filtering is suitable for receiving a highly attenuated signal. Without the gain of an active filter, it could be impossible to detect a signal lower than the ST7538Q receiving sensitivity even filtering the noise around it. Therefore, the choice of the Rx filter depends mostly on the attenuation introduced by the network and then on the point of insertion of the power line communication node. It is possible to choose the received signal path on the board by configuring the three jumpers shown in Figure 9 (JP1, JP2 and JP3) in different ways. The Rx path can include only the passive filter, only the active filter, both of them or even none (no filtering).
Figure 18 and Figure 19 show the measured transfer function of the Rx active filter for both channels. The curves show a 10 dB gain at center frequency and a -3 dB bandwidth of about 20 kHz.
Figure 18. Measured frequency response of the Rx active filter for 72 kHz channel (typical)
12 10 8 6
Gain (dB)
4 2 0 -2 -4 -6 -8 -8 1.0E+04
1.0E+05
1.0E+06
Freq (Hz)
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Board description
AN2744
Figure 19. Measured frequency response of the Rx active filter for 86 kHz channel (typical)
12 10 8 6
Gain (dB)
4 2 0 -2 -4 -6 -8 -8 1.0E+04
1.0E+05
1.0E+06
Freq (Hz)
Figure 20 and Figure 21 show the simulation results with Montecarlo analysis. The gain variation at center frequency is less than 2 dB.
Figure 20. Simulated frequency response of the Rx active filter for 72 kHz channel with tolerance effect
12 11 10 9 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 3E4 4E4 4E4 5E4 6E4 7E4 8E4 9E4 1E5 2E5 3E5
1.5 dB
f
H
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AN2744
Board description
Figure 21. Simulated frequency response of the Rx active filter for 86 kHz channel with tolerance effect
12 11 10 9 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 3E4 4E4 4E4 5 E4 6E4 7E4 8E4 9E4 1E5 2E5 3E5
2 dB
5.1.5
Input impedance
The input impedance of a power line communication node is another critical point. Figure 22 through 25 show the curves of input impedance magnitude vs. frequency in both Tx and Rx mode for the two channels. The impedance magnitude values prove that the ST7538Q dual channel reference design board is compliant with EN50065-7 normative, which sets the following minimum impedance constraints for this kind of equipment: Tx mode: free in the range 3 to 95 kHz, 3 from 95 to 148.5 kHz Rx mode: 10 from 3 to 9 kHz, 50 between 9 and 95 kHz only inside signal 20 dBbandwidth (free for frequencies outside signal bandwidth), 5 from 95 to 148.5 kHz
Figure 22. Measured input impedance magnitude of the coupling interface in Rx mode for the 72 kHz channel (typical curve)
Impedance modulus ()
1000
100
10
EN50065-7
1 1E+04 1E+05 1E+06
Freq (Hz)
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Board description
AN2744
Figure 23. Measured input impedance magnitude of the coupling interface in Rx mode for the 86 kHz channel (typical curve)
Impedance modulus ()
1000
100
10
EN50065-7
1 1E+04 1E+05 1E+06
Freq (Hz)
Figure 24. Measured input impedance magnitude of the coupling interface in Tx mode for the 72 kHz channel (typical curve)
Impedance modulus ()
1000
100
10
EN50065-7
1 1E+04 1E+05 1E+06
Freq (Hz)
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AN2744
Board description
Figure 25. Measured input impedance magnitude of the coupling interface in Tx mode for the 86 kHz channel (typical curve)
Impedance modulus ()
1000
100
10
EN50065-7
1 1E+04 1E+05 1E+06
Freq (Hz)
5.2
5.2.1
Conducted disturbances
Conducted emissions
The EN50065-1 standard describes test setup and procedures for this kind of test. The measures have been done with 220 VAC mains voltage. The test pattern consists of a continuous transmission of a fixed tone at a frequency of 70.8 kHz (72 kHz center frequency minus half the FSK frequency deviation, in this case 2400 Hz) which corresponds to a symbol "1". The output signal measured at the artificial network has a value of 120 dBV rms, which means a 2 V rms signal on the mains output of the board. The spectrum analyzer performs a peak measure instead of a quasi-peak measure. For continuous sinusoidal signals, the two types of measurement give the same result.
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Board description
AN2744
Figure 26. Conducted disturbance test setup
Figure 27 and Figure 28 show the results for the output spectrum measurement. The EN50065-1 disturbance limits mask is traced in red. It may be compared with the typical output spectrum of the ST7538Q dual channel reference design board for each channel. Figure 27. Output spectrum (typical) at 72 kHz channel, mains 220 VAC, fixed transmitted tone = "1"
130.0 120.0 fC =70.8 kHz S=120.1 dBV
Output Level (dBuV)
110.0 100.0 90.0 80.0 70.0 60.0 50.0 40.0 30.0 1.0E+04 EN50065-1 EN50065 2fC =141.6 kHz S=55.3 dBV 3fC =212.4 kHz S=58.1 dBV
1.0E+05
1.0E+06
1.0E+07
1.0E+08
Frequency (Hz)
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AN2744
Board description
Figure 28. Output spectrum (typical) at 86 kHz channel, mains 220 VAC, fixed transmitted tone = "1"
130.0 120.0 fC=84.8 kHz S=120.1 dBV
Output Level (dBV)
110.0 100.0 90.0 80.0 70.0 60.0 50.0 40.0 30.0 1.0E+04 3fC=254.4 kHz S=50.3 dBV EN50065-1 EN50065-1 2fC=169.6 kHz S=58.6 dBV
1.0E+05
1.0E+06
1.0E+07
1.0E+08
Frequency (Hz)
5.2.2
Noise immunity
The tests on immunity against white noise and narrowband conducted interferences are based on two ST7540 reference design boards performing a simplex (unidirectional) communication. The first board transmits a given bit sequence, while the receiving board passes the received bit stream to a PC bit error rate (BER) tester software, which evaluates the percentage of correctly received bits. The noise (white noise or sinusoidal interferer) is produced by a waveform generator and injected into the artificial network through an AC-coupling circuit. Figure 29 illustrates the test environment used for noise immunity tests.
Figure 29. Narrowband conducted interference test setup
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Board description Table 6 gives the parameters for setting the test conditions.
AN2744
The received signal and noise level are measured with a spectrum analyzer at both the ST7538Q RAI pin and the measurement port of the CISPR artificial network. To obtain the right value, the noise level is measured in absence of the transmitted signal. The 3 kHz resolution bandwidth of the spectrum analyzer has been chosen to fit the spectrum of the transmitted FSK signal at 2400 baud.
Table 6. Noise immunity test settings
Parameter Received signal at RAI pin Frequency Baud rate Deviation Detection method Detection time Sensitivity Input filter Transmitted sequence S.A. resolution BW Value 78 dBV rms 72 kHz 2400 1 Carrier with conditioning 3 ms High Off AACC h 3 kHz
Figure 30 represents the measured BER vs. SNR curve at both RAI pin and measurement port of the CISPR network in presence of white noise. It may be noted that a BER of 10-3 corresponds to a value of SNR which is a little higher than 12 dB, as it can be expected for a non-ideal FSK demodulator. The curve of Figure 30 is valid for both 72 and 86 kHz channels. Figure 30. Measured BER vs. SNR curve (typical), white noise
1.0E-01 RAI 1.0E-02 CISPR
1.0E-03
BER
1.0E-04 1.0E-05 1.0E-06 1.0E-06 6 7 8 9 10 11 12 13 14 15 16 17 18
SNR (dB)
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AN2744
Board description
For narrowband interference tests, two types of interfering noise have been used: a pure sinusoidal tone and an amplitude-modulated signal, (modulating signal 1 kHz, modulation depth 80%). In these tests, the amplitude of the noise tone (or the carrier, in case of modulated interferer) is varied until the measured BER reaches 10-3 (one error every 1000 transmitted bits).
Figure 31 shows the measured SNR vs. frequency curves for both pure sinusoidal tone and AM modulated interferer, with a fixed BER of 10-3. Figure 31. Measured SNR vs. frequency curves (typical) at BER=10-3 - 72 kHz channel
10.0 5.0 0.0 -5.0 Pure tone AM 1kHz 80%
SNR (dB)
-1 0 . 0 -1 5 . 0 -2 0 . 0 -2 5 . 0 -3 0 . 0 -3 5 . 0 -4 0 . 0 -4 5 . 0 -45.0 30 40 50 60 70 80 90 100
Freq (kHz)
Figure 32. Measured SNR vs. frequency curves (typical) at BER=10-3 - 86 kHz channel
10.0 5.0 0.0 -5.0 Pure tone AM 1kHz 80%
SNR (dB)
-10.0 -15.0 -20.0 -25.0 -30.0 -35.0 -40.0 -45.0 -45.0 50 60 70 80 90 100 110 120
Freq (kHz)
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Board description
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5.3
Thermal design
All heat dissipation is based on the heat exchange between the ST7538Q IC, the PCB and the environment. A large PCB copper area under the device is recommended in order to achieve a better heat transfer from the IC to the environment, see Figure 33. The metallic slug under the ST7538Q (the exposed pad of the PwTQFP44 package) must be properly soldered to the ground copper area on the PCB top side, as recommended in the datasheet. For the ST7538Q dual channel reference design, the dissipating area is nearly 1.5 cm². The larger ground layer on the bottom side should be connected to the top side area through multiple via holes.
Figure 33. PCB copper dissipating area for the ST7538Q dual channel reference design
Top Layer
Bottom Bottom Layer
Copper Area
Soldering Area
Multiple Via Holes
Large GND layer
Even if the ST7538Q has an integrated thermal shutdown circuitry, turning off the power stage if the die temperature (TJ) surpasses 170 C, it is recommended that TJ does not exceed 125 C to guarantee a safe condition for IC operation. The relationship between the junction temperature TJ and the power dissipation during transmission PD is described by the following formula: TJ(tTX, d) = TA - PD·JA(tTX, d) where TA is the ambient temperature (from -45 to +85 C) and JA is the junction-to-ambient thermal impedance of the ST7538Q IC. The value of the thermal impedance depends on the length of the transmission (tTX) and on the duty cycle d = tPKT/(tPKT+tIDLE), assuming a packet-fragmented transmission as depicted in Figure 34.
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AN2744
Board description
Figure 34. Packet-fragmented transmission
Transmission in progress
Idle state
tPKT
tIDLE tT X
When soldered to a proper copper area on the PCB, according to the suggestions previously given, the IC is characterized by a steady-state thermal impedance of about 35 C/W. Nevertheless, as shown in Figure 35, the steady-state value is reached after a transient whose duration depends on the duty cycle (d) of the transmission. In other words, a higher PD can be sustained if the transmission time is less than the transient completion time and if the duty cycle of the transmission is lower than 100%.
Figure 35. Thermal impedance typical curve for the ST7538Q mounted on the reference design board
40 35 30 d=1 d=0.75 d=0.5 d=0.25
ja (C/W)
25 20 15 10 5 0 1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
1.0E+03
time (s)
Actual dissipated power PD can be calculated as: PD = PIN - POUT where PIN = VCC x ICC and POUT = VOUTrms x IOUTrms. The value of VCC can be inferred from the ICC value according to the load regulation curve of the power supply, shown in Figure 44 on page 45 in Section 5.7. Considering the power consumption by receiving circuitry and linear regulators negligible for thermal analysis purposes, the current absorption from the power supply (ICC) results are nearly equal to the PLI output current to the load (IOUTrms), so PD can be expressed as: PD = (VCC - VOUTrms) x IOUTrms
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Board description
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Therefore, once the output voltage is fixed by the VSENSE partitioning, the required PD can be calculated as a function of the load current (IOUTrms). The resulting value can be compared with the dissipation limit imposed by the JA value, as a function of tTX and duty cycle, to keep the junction temperature below the 125 C limit.
5.4
Oscillator section
The ST7538Q crystal oscillator circuitry is based on a MOS amplifier working in inverter configuration. This circuitry requires a crystal having a maximum load capacitance of 16 pF and a maximum ESR of 40 . It is very important to keep the crystal oscillator and the load capacitors as close as possible to the device. The resonant circuit must be far away from noise sources such as: power supply circuitry burst and surge protections mains coupling circuits any PCB track or via carrying a signal To properly shield and separate the oscillator section from the rest of the board, it is recommended to use a ground plane, on both sides of the PCB, filling all the area below the crystal oscillator and its load capacitors. No tracks or via holes, except for the crystal connections, should cross the ground plane. It is also recommended to use a large clearance on the oscillator-related tracks, to minimize humidity problems, see Figure 36. Connecting the case to ground is also a good practice to reduce the effect of radiated signals on the oscillator.
Figure 36. A recommended oscillator section layout for noise shielding
ST7538Q
25 25 26 SGND XOUT 27 XIN
TOP Layer
Clearance
BOTTOM Layer
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AN2744
Board description
5.5
Surge and burst protection
The specific structure of the coupling interface circuit of the application is a weak point against high voltage disturbances that can come from the external environment. In fact an efficient coupling circuit with low insertion losses realizes consequently a very low impedance path from the mains to the power line interface of the device. For this reason it's recommended to add some specific protections on the mains coupling path, in order to prevent high energy disturbances coming from the mains from damaging the internal power circuitry of the ST7538Q. The possible environments for this kind of application can be both indoor and outdoor: residential, commercial and light-industrial locations. To verify the immunity of the system to environmental electrical phenomena, a series of immunity specification standards and tests must be applied to the power line application. The requirements for ac-connected ports include EN610000-4-4 (electric fast transients), EN610000-4-5 (surges), EN610000-4-6 (RF out-of-band disturbances), EN610000-4-11 (voltage dips). All these tests are listed in the EN50065-2-3 document (part 7, immunity specifications). In particular, surge tests are specified as both common and differential mode at level +/- 4 kV, with pulse shape 1.2 x 50 s. Fast transient burst tests are specified at level +/- 2 kV, with pulse shape 5 x 50 ns and pulse frequency 5 kHz.
Figure 37 and Figure 38 illustrate the protection criteria implemented in the ST7538Q reference design. Figure 37 shows the protection against common mode disturbances. The ESD TransilTM protection diodes are able to absorb quickly fast transient disturbances starting from their 6.1 V threshold voltage. Figure 38 describes the protection intervention in case of differential mode disturbances. A differential voltage higher than 6.8 V is shorted by the bidirectional power TransilTM, which is the most robust protection and also the one that is able to absorb most of the energy of any incoming disturbance.
Figure 37. Common mode disturbances protection
ATOP1 ATOP1
N
1 3 2
4
5
1
8
ATOP2
P
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Board description
AN2744
Figure 38. Differential mode disturbances protection
ATOP1 ATOP1
N
1 3 2
4
5
1
8
ATOP2
P
5.6
50-pin connector for communication board
The ST7538Q transceiver requires external digital control to perform communication. This is done through an ST7 microcontroller which is accommodated on the IBU communication board (see Section 4). The communication with the ST7 microcontroller involves several signals, which can be gathered into 3 groups: digital signals, analog signals and power connections. The signals for each group are listed in Table 7, Table 8 and Table 9. Beside the ST7538Q input and output signals, the link to the IBU communication board includes: A 2-bit (B_ID_PLM_1 and B_ID_PLM_0) Board Identification Code, which identifies the hosted power line transceiver. The "00" HW binary configuration makes the microcontroller able to recognize the ST7538Q reference design board. A VDDF_FORCE signal that forces the microcontroller to refer digital interface levels to VDDF (VDD) supply voltage provided by the ST7538Q reference design board. This way both the modem and the microcontroller communicate on the same digital levels.
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Board description
Figure 39. Scheme of the communication board connector
CN1 MC LK VD D F _F OR C E R EG_OK 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 C ON 50A 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 PLM_10V VD D VD D F R ESET N EG_C H 2 CH2 B_I D _PLM_1 GN D B_I D _PLM_0 B_ID_PLM_0 GN D P10V
C D / PD R EG_D ATA RxD R x Tx Z C OU T C LR T TOU T Tx D
WD BU PG
Table 7.
Pin n 3 8 11 14 18 35 37 39 41 43 45 46 47 48 49 50
50-pin connector digital signals
Signal name MCLK RESET REGOK NEG_CH2 CH2 CD/PD REG/DATA RxD RxTx ZCOUT CLR/T WD TOUT BU TxD PG Description Oscillator output (programmable) Reset Out for microcontroller Register OK signal Secondary channel select (active low) Secondary channel select (active high) Carrier or preamble detected signal Register or Data access Serial Data Out Reception or Transmission select signal Zero-crossing detection output Serial Data Clock Watchdog counter reset Timeout / Thermal Protection event signal Band in Use detection signal Serial Data Input Power good signal Generated by ST7538Q ST7538Q ST7538Q C C ST7538Q C ST7538Q C ST7538Q ST7538Q C ST7538Q ST7538Q C ST7538Q
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Board description
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Table 8.
Pin n 20 28 5
50-pin connector control signals
Signal name B_ID_PLM_1 B_ID_PLM_0 VDDF_FORCE Description Board ID for PLM Applications (MSB) Board ID for PLM Applications (LSB) Force C digital level to VDDF Generated by PLC Board PLC Board PLC Board
Table 9.
Pin n 2 4 6 22,34
50-pin connector power connections
Signal name PLM_10V VDD VDDF GND 10V power supply 3.3V/5V power supply Digital power supply Ground Description Generated by PLC Board ST7538Q ST7538Q -
5.7
Power supply
The ST7538Q dual channel reference design includes a specifically designed switching mode power supply circuit, based on ST's VIPer12AS-E device. VIPer12AS-E is a smart power device with current mode PWM controller, startup circuit and protections integrated in a monolithic chip using VIPower M0 technology. It includes a 27 Mosfet with 730 V breakdown voltage and a 400 mA peak drain current limitation. The switching frequency is internally fixed to 60 kHz, in order to provide a good compromise between EMI performances and magnetic parts dimensioning. The internal control circuit offers the following benefits: - large input voltage range on VDD pin accommodates changes in supply voltage - automatic burst mode in low load condition - overload and short circuit protection in hiccup mode The power supply is designed in isolated flyback configuration with secondary regulation by means of an optocoupler and a Zener diode, considering the requested output tolerance for the specified application. The main specifications are listed in Table 10
Table 10.
SMPS specifications
Parameter Input voltage range, VIN Output voltage, VOUT Peak output current, IOUT(MAX) Value 85-265 VAC 10V10% 600 mA
In the input stage, an EMI filter is implemented (C2, L2, C10, L3, C5) for both differential and common mode noise, in order to fit the requested standard.
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Board description
The blocking diode D4 and the clamping network (R1-C1) clamp the peak of the leakage inductance voltage spike, assuring reliable operation of the VIPer12AS-E. D4 must be not only very fast-recovery but also very fast turn-on type to avoid additional drain overvoltage. The clamp capacitor C1 must be low-loss type (with polypropylene or polystyrene film dielectric) to reduce power dissipation and prevent overheating, since it is charged with high peak currents by the energy stored in the leakage inductance. Also a leading edge blanking (LEB) circuit for leakage inductance spikes filtering has been implemented (Q3 - C30 - R23). It blanks the spike appearing at the leading edges of the voltage generated by the self-supply winding, greatly improving the behavior in short-circuit. The output rectifiers have been selected considering the maximum reverse voltage and the RMS secondary current. A STPS1H100 Power Schottky rectifier has been chosen for this purpose. A LC filter has been added on the output (made of L1 and C4) in order to filter the high frequency ripple without increasing the output capacitors size or quality. The transformer used for this application has three windings, since one of them is needed to supply the VIPer12AS-E. The primary inductance has been chosen at 2.7 mH and the reflected voltage has been set to 80 V. A layer type has been chosen, with EF12.6 or E13/7/4 core. The characteristics are listed in Table 11.
Table 11. SMPS transformer specifications
Parameter Core Geometry Primary Inductance Leakage Inductance NP NAUX NSEC Withstanding Voltage Value SRW12.6ES or E13/7/4 2.7 mH10% 180 H max 224 turns 0.1mm 39 turns 0.1mm 31 turns 0.2mm (TEX-E wire) 4 kVRMS
In the following pictures some significant waveforms are represented. Figure 40 and Figure 41 show typical waveforms in both open load and full load conditions. An important behavior in any SMPS is the protection against output short circuit. All tests have been done by shorting the SMPS output at maximum input voltage. The results are shown in Figure 42. The main parameters are the drain-source voltage (VDS), the output current (IOUT) and the supply voltage (VDD). The output current is an important parameter to be checked during shorts. Although the output current peaks are quite high, the mean value is very low, thus preventing component melting for excessive dissipation. In this way, the output rectifier, transformer windings and PCB traces won't be overstressed. This assures system reliability against long-term shorts. Besides, in case of device overheating, the integrated thermal protection stops the device operation until the device temperature falls.
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Board description
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The startup phase could also be critical for the SMPS as output overshoot occurs if the circuit is not properly designed. Care must be taken in designing a proper clamp network in order to prevent voltage spikes due to leakage inductance from exceeding the breakdown voltage of the device (730 V minimum value). The startup transient is shown in Figure 43. Note that the maximum drain-source voltage doesn't exceed the minimum breakdown voltage BVDSS, with a reasonable safety margin. Finally, load regulation is presented in Figure 42 and Figure 43 for different load conditions. The voltage ranges from 10 V to 9.3 V, within the requested tolerance.
Figure 40. Typical waveforms at 230 VAC: open Figure 41. Typical waveforms at 230 VAC: full load load
VDD
VDD
IOUT
VDS
VDS
IOUT
Ch1 Freq - 9.62kHz; Ch2 Mean - 9.90V
Ch1 Freq - 57.71kHz; Ch2 Mean - 13.79V; Ch4 Max 503mA
Figure 42. Typical waveforms at 265 VAC: short-circuit
Figure 43. Typical waveforms at 265 VAC: startup
VDD
VDS
VDS
VDD
IOUT
IOUT
Ch2 Freq - 23.50Hz; Ch4 Max - 2.08A; Ch4 Mean - 383mA
Ch1 Max - 702V; Ch2 Mean - 19.72V; Ch4 Max - 500mA
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Board description
Figure 44. Load regulation
10.5 10.4 10.3 10.2 10.1 10 9.9 9.8 9.7 9.6 9.5 9.4 9.3 9.2 9.1 9 8.9 8.9 0 100 200 300 IOUT [mA] 400
185 V ac 230 V ac 265 V ac
VOUT [V]
500
600
Figure 44 shows the efficiency vs. output current curve. Minimum efficiency occurs at low load condition, as expected from any SMPS. This is not an issue for our application, since low efficiency corresponds also to low power consumption and thus to low dissipation.
On the other hand, at full load condition the efficiency is reduced because of the losses due to R1 (series input resistor limiting in-rush current) and to the filtering on both primary and secondary side. Filtering is more important than efficiency because a power line communication appliance has very restrictive electromagnetic disturbance limits and it's also highly sensitive to noise coming from the power supply.
Figure 45. SMPS efficiency curve
0.73 0.71 0.69 0.67
0.65
0.63 0.61 0.59 0.57 0.57 50 100 150 200 250 300 350 400 450 500 550 600
IO U T [ m A ]
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Performance and ping tests
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6
Performance and ping tests
Our evaluation environment includes a ping test embedded into the demonstration software and the communication board firmware. This feature allows to perform in-field communication tests and to evaluate reachability of PLC network nodes. A ping session is based on a master board sending to one or more slave boards a sequence of messages. If the messages are correctly received by the slave boards, they are resent one by one to the master. The PC.connected to the master keeps statistics of the messages sent and correctly received by the slave boards, making it possible to get a numerical evaluation of the reachability of each node corresponding to a slave.
Figure 46 represents the ping window of the demonstration software tool for the master node. The main characteristics of this tool are indicated in red.
Figure 46. Demonstration software window for the master board
Number of Sl aves (up to 255) Number of Messages
Repetition Repetition Control Graphical Statistics
Medium Access Control
La st Message Status
Numerical Statistics
Special controls are included in the ping test: Repetition control: repetition can be used to improve reliability of the communication. When enabled, if a message is not responded by a slave, it will be re-sent up to three times before sending a new message. Medium access control: defines what type of medium access has to be used. Choices are "none", "BU" or "PD". In the last two cases, messages are sent to slave only if BU or CD/PD lines of the ST7538Q modem are not active. If PD setting is selected, content of the ST7538Q internal control register is changed to select "Preamble" as the detection method. For further details about the ST7538Q demonstration software tool, please refer to UM0241 "ST7538 Power Line Modem DEMO KIT GUI - User Guide".
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Application ideas
7
7.1
Application ideas
Three-phase architecture
The ST7538Q modem can be used to communicate on a three-phase network. A microcontroller should switch communication between the three phases, since the modem can transmit/receive over only one phase at a time. In the example scheme of Figure 47, the microcontroller uses three output lines as enable signals for three switches (typically opto-switches), one for each phase line. For the modem, there is no difference with respect to single-phase communication.
Figure 47. Scheme of principle for three-phase architecture
Controller
Enable Ph1 Enable Ph2 Enable Ph3
T R
Ph1 Ph1
Ph2
Ph3
ST7538
Neutral
RAI
Rx and TX Filters
ATOP1 ATOP2
7.2
Received signal strength indication (RSSI)
In many application fields, measuring the strength of the incoming signal is useful to: 1. evaluate the SNR (signal-to-noise ratio) at the node 2. choose the best routing through the network (if repeaters are allowed) A possible received signal strength indicator (RSSI) implementation is the one depicted in Figure 48, where a peak detector is used to measure the amplitude of the incoming signal.
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Application ideas
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Figure 48. Peak detector electrical schematic
5V
8 Rx_IN 3 2 + 4 R1 100k R2 18k
U1A 1 LM393
R4 4.7k D1 DC_OUT 1N4148 C1 100n R3 82k
The schematic above is based on a simple diode-capacitor (D1-C1) circuit improved with an LM393 comparator so that: The comparator eliminates the diode reverse voltage The feedback network (R3/R2) introduces a gain of 4 to improve the performance against low amplitude signals In the end this circuit gives on DC_OUT line a DC voltage proportional to the AC peak to peak level at the input. Figure 49 shows the measured behavior of this circuit with a given pure sinusoidal waveform at the input. The DC_OUT signal shall be converted by the application microcontroller through an integrated A/D converter.
Figure 49. Measured DC_OUT vs. AC_IN peak detector performance
3000
2500
DC_OUT [mV]
2000
1500
1000
500
0 0 200 400 600 AC_IN [mVpp] 800 1000 1200
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Application ideas
7.3
110-132.5 kHz dual channel coupling circuit
In this paragraph the dual channel application circuit for CENELEC band B and C is suggested. The 110 and 132.5 kHz channel frequencies of the ST7538Q transceiver are suitable for home automation applications and in general for applications not subject to the European AMR regulations.
Table 12 gives the values for changing a few components to obtain a dual channel line coupling interface at 110 kHz (CH1) and 132.5 kHz (CH2)
Table 12.
List of components to be modified for the 110-132.5 kHz dual channel coupling
Reference L5 L6 L7 C16 C20 C27 C29 R18 R21 Value 47 H 22 H 220 H 2.2 nF 6.8 nF 82 nF 220 nF 390 6.8
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Troubleshooting
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8
Troubleshooting
In this section the most frequently asked questions are described. 1. PROBLEM: the ST7538Q reference design board doesn't work at all.
What to check:
2.
Check that the AC mains supply cable is well connected to CN2. Check if the green LED D2 is on. Check voltage on the 10 V test point near the ST7538Q. The value must be 9 to 11 V. PROBLEM: the ST7538Q reference design board is not responding. a) Check the VDC 5 V voltage output. Spurious voltage spikes can cause dips on the VDC line. This could force a shutdown of the Tx circuitry if the VDC voltage goes below 1.5 V. The solution is to force a power-off by mains disconnection. b) Verify if MCLK selected frequency is present to check whether the ST7538Q is working. c) Verify the connection between the reference design board and the communication board and between the communication board and the PC. PROBLEM: the ST7538Q reference design board does not transmit. a) Check the voltage on ATOP1 and ATOP2 test points with the oscilloscope ground probe connected to the AVSS signal ground. Programmed carrier frequency must be present on both lines. Check that programmed board channel (CH1/CH2) is matching the carrier frequency selected through the control register panel of the reference design software window. Check that there is no short-circuit impedance on the mains at the selected transmitting channel. Check CL voltage. CL voltage fixes the current limiting threshold. It has to be lower than 1.9 V, otherwise the IC is put in current limit mode.
a) b) c)
What to check:
3.
What to check:
b)
c) d)
If current limit mode is forced on the transceiver, check the value of R19 feedback resistor and if there are any short circuits in the transmission path on the board. 4. PROBLEM: the ST7538Q reference design board transmits only for a short while.
What to check:
5.
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Check transmission time-out setting. It has to be disabled for continuous transmission. b) Check if continuous or single sequence transmission is selected in the Tx panel of the reference design software window. Select continuous mode to be able to force a lasting transmission. c) Check if zero-crossing function is enabled. If yes, verify the ZCOUT synchronization bit. d) Check that there is no short-circuit impedance on the mains at the selected transmitting channel. PROBLEM: the ST7538Q reference design board does not receive.
a)
AN2744 What to check:
Troubleshooting
6.
Note:
Check if JP2 and JP3 are closed. Please refer to Section 5.1 for receiving path configuration. b) Check if carrier frequency is present on RAI pin voltage with the oscilloscope ground probe connected to the AVSS signal ground pin. c) Check that programmed board channel (CH1/CH2) is matching the carrier frequency selected through the control register panel of the reference design software window. d) Check preamble detection setting on the control register panel of the reference design software window. e) Check if data are present on RxD pin. PROBLEM: During a ping test or a transmission test, the ST7538Q reference design board shows a high bit error rate.
a)
This point refers to a half-duplex communication involving two ST7538Q reference design boards communicating with each other. What to check:
a) b)
c) d)
Check that both reference design boards are programmed to transmit/receive on the same carrier frequency. Check on both reference design boards that programmed board channel (CH1/CH2) is matching the carrier frequency selected through the control register panel of the reference design software window. Check preamble detection setting on the control register panel of the reference design software window. Check if data are present on RxD pin.
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List of normative references
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9
List of normative references
EN50065: Signaling on low voltage electrical installations in the frequency range 3 kHz to 148.5 kHz
Par t 1: General requirements, frequency bands and electromagnetic disturbances Par t 2-1: Immunity requirements Par t 4-2: Low voltage decoupling filters - Safety requirements Par t 7: Equipment impedance
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Board layout
Appendix A
Board layout
Figure 50. PCB layout - top view
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Board layout
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Figure 51. PCB layout - bottom view
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Revision history
10
Table 13.
Date
Revision history
Document revision history
Revision 1 Initial release. Changes
30-Apr-2008
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