AN1347 Application note
Solution proposal for VIPower: VIPer12A-E evaluation board, standby application
Introduction
This general circuit can be used in a flyback or forward mode to produce any output voltage in primary or secondary mode regulation and is suitable for a multiple output power supply. This application is for a low input power flyback standby power supply and uses the VIPer12ADIP-E. The VIPer12A-E technology contains a state-of-the-art PWM circuit and a Vertical Power MOSFET, which is avalanche rugged, on the same silicon chip. It is suitable for off-line wide range input voltage power supplies of up to 6 W (12 W for high input voltage range). This solution has the advantage of using few external components compared to a discrete solution, can be used for primary or secondary regulation, has a burst mode in standby for Blue Angel operation, a fixed operating frequency of 50 kHz, has current mode control, a built-in current limit and contains thermal protection. It has a very wide range Vdd voltage and is particularly suitable for a battery charger application or a low input power standby application. Figure 1. Standby application electrical schematic
L1 10 120uH BR1 10 TR1 4 4 1 D3 2 10uH BYW100-200 1 1 C10 4 3 2 C12 4.7uF C2 10uF C3 47pF 600V,1A 5 5 R0 D1 1N4448 R1 CL210 C1 .047uF 1 2 U1 4.7nF 1 R4 220 R8 R6 J1 L N CON 1 C4 22uF 1 2 1 F1 0.25A 1 2 2 5 DRAIN VDD 4 1 R7 9.1K H11A817A 2 U2 1K 5.11K 1% 2 zero C8 R2 2K 680uF 1 8 6 C9 8 6 1000uF 1 2 J2 1 2 CON2 L2
SOURCE FB VI Per12A-E
3 U3 C6 47nF TL431 1
C11 0.1uF
1
R5 4.99K 1%
The following description is for a standby application with a 5 V output voltage, an output power of 5 W and a wide range input voltage (see Figure 1). The VIPer12A-E used is an eight pin dip rated for 730 V maximum with a maximum peak drain current of 0.36 A. In the circuit at maximum load, the device has a maximum voltage of 560V at 264Vac and a maximum peak current of 0.25 A at 85Vac. This circuit is operating at 50kHz and is set up for secondary regulation with an optocoupler. The circuit contains an input fuse (F1), an inrush thermistor (R1), EMI filtering (C1, L1, C8, C12, C2), and a snubber circuit (C3, R2). The output transformer (TR1) is built by Cramer Coil & Transformer Co., Inc. (CVP 11-006). The PCB assembly does not contain the clamp components (D5, C7 and R9) which are used to lower the spike on the drain to source voltage. Also, the components used for primary regulation D4 and R3 are not assembled.
October 2007
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Contents
AN1347
Contents
1 2 3 4 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Board legend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 General circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Primar y regulation alternative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 6 7 8 9
Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Transformer considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Performance considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Cost considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
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Operating conditions
1
Operating conditions
Table 1. Operating conditions
Parameter Input voltage range Input frequency range Temperature range Output voltage Output power Output power Efficiency Output ripple voltage Results 85 to 264 Vac 50/60 Hz 10 to 55 C 5V Discontinuous 5 or 10 W See Figure 6 1% to 3% p-p
2
Waveforms
Figure 2 and Figure 3 show typical waveforms of the drain source voltage and the drain current for an input voltage of 120 Vac and maximum load current. Figure 2. Drain source voltage and drain current
Figure 3.
Drain source voltage and drain current
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Board legend
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Board legend
The components for the major loop (the bulk capacitor C2, the primary on the output transformer TR1 and the VIPer12A-E U1) are placed in close proximity so that the current loop area is as small as possible. Also, components on the secondary (output rectifier D3, capacitors C9, C10, inductor L2 and transformer output winding TR1) are placed to reduce the current loop area. Figure 4 and Figure 5 show the VIPer12A-E evaluation board printed circuit board layout. Note that the width of the current loop area used is as small as possible and still meets the voltage spacing requirements. Figure 4. PC board top legend (not to scale)
Figure 5.
PC board bottom foil (not to scale)
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Board legend
Table 2.
Quantity 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Bill of material
Reference BR1 C1 C2 C3 C4 C6 C8 C9 C10 C11 C12 D1 D3 F1 J1 J2 L1 L2 R0 R1 R2 R3 R4 R5 R6 R7 R8 TR1 U1 U2 U3 Value 600 V, 1 A bridge 0.047 F, 250Vac Box Cap 10 F, 400 V electro EB 47 pF, 1 kV ceramic Disc 22 F, 50 V electro 47 nF, 50 V Poly 4.7 nF, 250 V Y Cap 1000 F, 10 V electro FC 680 F, 10 V electro FC 0.1 F, 50 V ceramic 4.7 F, 400 V electro Nichicon 1N4448 BYW100-200 0.25 A round time lag 5 mm 2 pin connector 3.5 mm 2 pin Connector 120 H Inductor 10 H 22ga Jumper CL210 Thermistor 1 k 1/4 W, 5% , 1 k 1/4 W, 5% (not used) , 220 1/4 W, 5% , 4.99 k 1/4 W, 1% , 1 k, 1/4 W, 5% 9.1 k 1/4 W, 5% , 5.11k 1/4 W, 1% , CVP11-006 VIPer12ADIP-E H11A817A optocoupler TL431CLP PC board CVP11-006 Cramer coil STMicroelectronics VIPer12ADIP-E H11A817A STMicroelectronics TL431CLP Amitron STMicroelectronics 1N4448 STMicroelectronics BYW100-200 FUSE Phoenix OST Part number
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General circuit description
AN1347
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General circuit description
The VIPer12A-E evaluation board is designed as a discontinuous flyback regulator where the energy is stored in the transformer TR1, with primary winding 8-10, when the VIPer12AE (U1) is on and delivered to the output, 4-1, and auxiliary winding, 6-5, when the VIPer12AE is off. The auxiliary winding provides the bias voltage for the VIPer12A-E at the Vdd pin 4. Unlike other VIPer's, the VIPer12A-E operates by monitoring the current into the feedback pin 3 (FB). When the current into the feedback, Ifb, is zero, the VIPer12A-E is operating at its full power level. When an Ifb current close to 1mA is reached, the VIPer12A-E shuts down. Regulation is achieved by controlling the proper amount of current into the feedback pin. The output voltage is regulated with a TL-431 (U3) via an optocoupler (U2) to the feedback pin. If the output voltage is high, the TL-431 turns on and the current increases in the optocoupler pins 1-2. The current in optocoupler pins 4-3 increases and the current into the VIPer12A-E FB pin increases. When the FB current increases, the VIPer12A-E shortens the on-time and lowers the output voltage to the proper level.
4.1
Primary regulation alternative
For primary regulation, the following components are not used: U2, U3, C11, R4, R5, R6, R7, and R8. The components D4 and R3 are used. D4 provides a somewhat fixed voltage at the auxiliary winding for the Vdd voltage. Regulation depends on good coupling between the auxiliary winding and the output winding. This is an inexpensive solution for an output voltage regulation of about +-10% with a small change in output current.
5
Thermal considerations
The evaluation board is single sided and utilizes one ounce copper for all of the traces. A wide area of copper is used for a pad, on the evaluation board, to act as a heat sink for the VIPer12ADIP-E VIPer12A-E which reaches a peak Ids current of 0.25 A.
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Transformer considerations
6
Transformer considerations
The output transformer has a primary inductance of 3.4 mH, a ferrite core EE16 with 7099 material and an AL of 100. It is primary - secondary Hi Pot tested to 3750Vac for 1 second and meets IEC and UL specs. It is wound with a split primary - half on the bottom and half on the top with the auxiliary and output windings in the middle.
7
Performance considerations
A lower leakage inductance transformer allows a lower power snubber circuit and no clamp circuit to reduce the input power. A larger bulk capacitor or full bridge reduces the input ripple voltage and allows operation at a lower input line or higher load. The output filter contains a 10 H inductor (L2) for a typical low output ripple voltage of about 1% p-p at full power. A higher ripple voltage of about 3% p-p can be achieved without inductor L2.
8
Cost considerations
A single rectifier can be used instead of an input bridge. Note that the input ripple voltage is twice as much compared to the full bridge. Primary mode regulation can be used (with D4 and R3) without secondary regulation for a greater than 5% regulation requirement. Also, primary mode regulation can be used with a standard three terminal regulator for 5% regulation. The efficiency, in Figure 6, is for the VIPer12A-E evaluation board for various input voltages at an input power of one Watt. Also, the efficiency in decimal form is the output power for an input power of 1 W. Figure 6. Efficiency vs. Vin at Pin=1 W
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Revision history
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Revision history
Table 3.
Date 04-Jan-2005 25-Oct-2007
Document revision history
Revision 2 3 Minor text changes Document reformatted no content change VIPer12A replaced by VIPer12A-E VIPer12ADIP replaced by VIPer12ADIP-E Changes
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