STEVAL-IFS010V1
STR9 ZigBee extension board for the SN260 network processor
Data Brief
Features
Digital interfaces: 16 general purpose I/Os (GPIOs) One I2C bus interface Two SPI bus interfaces: one is used to interface with the STR9 dongle and the other is available to extend the board with another SPI device 2 external interrupts Digital MEMS in an LGA14 package (optional) 1 debug port 1 button and 2 LEDS
Description
The STR9 ZigBee extension board provides an SN260 ZigBee interface to an application using the STR9 dongle (part number STEVALIFD0 01 V1 ). The STMicroelectronics SN260 integrates a 2.4 GHz, IEEE 802.15.4-compliant transceiver with a 16-bit network processor (XAP2b core) to run EmberZNetTM, the ZigBee-compliant network stack. The SN260 accesses the EmberZNet API across a standard SPI module, allowing application development on a host processor. This means that the SN260 can be viewed as a ZigBee peripheral connected over an SPI. The XAP2b microprocessor is a power-optimized core integrated in the SN260. It contains integrated Flash and RAM memory along with an optimized peripheral set to enhance the operation of the network stack. For additional information regarding the SN260, please refer to the device datasheet. This document should be used in conjunction with user manual UM0282, which describes the STR9 dongle (part number STEVAL-IFD001V1).
STEVAL-IFS010V1
July 2008
Rev 1
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www.st.com 4
For further information contact your local STMicroelectronics sales office.
Block diagram
STEVAL-IFS010V1
1
Figure 1.
ZigBee
Block diagram
STR9 ZigBee extension board schematic
U2 RSTB 3.3 V 1 SN 260 RSTB SDBG HOST_INT ACTIVITY SPI_SEL SPI_MOSI SPI_MISO WAKE PTI_DATA PT I_EN 17 LED_SDBG 16 LE D_ACTIVE 15 WAKE_UP 14 PS_D ATA 13 PS_FRA ME 12 SIF_LO ADB 11 SIF_MOSI Debug I/F 10 SIF_MISO 9 SIF_CL K SPI_MOSI SPI_MISO 3.3 V CN3 1 3 5 2 4 6 SPI_CLK SPI_SEL2 R22 10 K 3.3 V PS_DATA PS_FRA ME RSTB SIF_LOADB SIF_CLK SIF_MOSI SIF_MISO 3.3 V CN1 10 9 8 7 6 5 4 3 2 1
R21 HOST_INT 2 10 K SPI_SEL0 3 SPI_MOSI 4 SPI_MISO 5 SPI_CLK 6 7 3.3 V 8
SPI_CLK SIF_LO ADB GN D VDD SIF_MOSI SIF_MISO SIF_CLK SN260
Header 3x2 LD24 2.1 V yellow R24 1 2 LED_ SDBG 300 -> 4 mA Active LD25 2.3 V green 1 2 LED_ ACTIVE WA KE _U P 2 3.3 V C20 100 nF C21 10 nF
3.3 V
R25 250 -> 4 mA Link
B2 2 EX T_ IN T
C22 10 nF
HOST_INT, and WAKE_UP are active low, must be kept pulled up externally
CONNECTORS to STR9_DONGLE
MEMS
3.3 V
3.3 V 3.3 V
SPI_S EL0 SPI_S EL2 SPI_CL K RSTB SPI_MISO HOST_IN T 3.3 V
CN2 DIGI TAL_ CON P80P 81 SP I_SEL1 1 2 P82P 83 3 4 P22P 84 5 6 P23P 85 7 8 P24P 86 9 10 P87P 25 SP I_ MOSI 11 12 P26P 27 SSP0_NSS R23 13 14 P55 WAKE_UP P5 4 15 16 10 k 17 18 19 20
65432 1 VCC GND GND GND VCC VDD_io SP I_S EL1 7 3.3 V CS SCL_SPC
U1 LIS302DL
14 SPI_CLK
INT_ 2 GND SDA/SDI INT_1 GND SDO 8 9 10 11 12 13 SPI_MOSI SPI_MISO 3.3 V C10 100 nF
3.3 V + C01 2.2 F
NSS = 1 means STR9 is master APM0025
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STEVAL-IFS010V1
Revision history
2
Revision history
Table 1.
Date 07-Jul-2008
Document revision history
Revision 1 Initial release. Changes
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STEVAL-IFS010V1
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