PM6600
6-row 32 mA LED driver with boost regulator for LCD panel backlight
Features
Boost section 4.7 V to 28 V input voltage range Internal power MOSFET Internal +5 V LDO for device supply Up to 36 V output voltage Constant frequency peak current-mode control 200 kHz to 1 MHz adjustable switching frequency External synchronization for multi-device application Pulse-skip power saving mode at light load Programmable soft-start Programmable OVP protection Stable with ceramic output capacitors Thermal shutdown Backlight driver section Six rows with 32 mA maximum current capability (adjustable) Up to 10 WLEDs per row Unused rows detection 500 ns minimum dimming time (1 % minimum dimming duty-cycle at 20 kHz) 2.1 % current accuracy 2 % current matching between rows LED failure (open and short circuit) detection
VFQFPN-24 4x4
Description
The PM6600 consists of a high efficiency monolithic boost converter and six controlled current generators (ROWs), specifically designed to supply LEDs arrays used in the backlight of LCD panels. The device can manage a nominal output voltage up to 36 V (i.e. 10 White-LEDs per ROW). The generators can be externally programmed to sink up to 32 mA and they can be dimmed via a PWM signal (1% dimming dutycycle at 20 kHz can be managed). The device allows to detect and manage the open and shorted LED faults and to let unused ROWs floating. Basic protections (output over-voltage, internal MOSFET over-current and thermal shutdown) are provided.
Applications
Notebook monitors backlight UMPC backlight Device summary
Order codes PM6600 VFQFPN-24 4x4 (exposed pad) PM6600TR Tape and reel Package Packaging Tube
Table 1.
October 2008
Rev 4
1/58
www.st.com
Contents
PM6600
Contents
1 2 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 2.2 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 3.2 3.3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 5 6 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Operation description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.1 7.2 7.3 7.4 Boost section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.1.1 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Over voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Switching frequency selection and synchronization . . . . . . . . . . . . . . . . . 28 System stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.4.1 7.4.2 Loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Slope compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7.5 7.6 7.7 7.8
Soft-star t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Boost current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8
Backlight driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.1 8.2 Current generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 PWM dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
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PM6600
Contents
9
Fault management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
9.1 9.2 9.3 9.4 9.5 FAULT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 MODE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Open LED fault . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Shor ted LED fault . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Intermittent connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Appendix A Layout guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
A.1 Basic points: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
A.1.1 A.1.2 GNDs planes - 1 device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 GNDs planes - 3 devices (RGB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
A.2 A.3 A.4 A.5 A.6 A.7
Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 LX area vout power area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Overvoltage divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 LDO5 AVCC filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 ROWs current generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Top layer of the standard PM6600 demonstration board. . . . . . . . . . . . . . 46
Appendix B Application note. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
B.1 B.2 B.3 B.4 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Flywheel diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Design example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
B.4.1 B.4.2 B.4.3 B.4.4 B.4.5 B.4.6 B.4.7 B.4.8 B.4.9 Switching frequency setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Row current setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Inductor choice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Output capacitor choice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Input capacitor choice. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Over-voltage protection divider setting . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Boost current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Soft-star t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
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Contents
PM6600
Appendix C Application suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
C.1 C.2 C.3 EN, DIM path in production line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Debug and measurements test points. . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Inductor choice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
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PM6600
List of figures
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin connection (through top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Efficiency vsDIM duty cycle @ fDIM = 200 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Efficiency vsDIM duty cycle @ fDIM = 500 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Efficiency vs DIM duty cycle @ fDIM = 1 kHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Efficiency vs DIM duty cycle @ fDIM = 5 kHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Efficiency vsDIM duty cycle @ fDIM = 10 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Efficiency vsDIM duty cycle @ fDIM = 20 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Efficiency vs DIM duty cycle @ Vin = 8 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Efficiency vs DIM duty cycle @ Vin = 12 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Efficiency vs DIM duty cycle @ Vin = 18 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Efficiency vs DIM duty cycle @ Vin = 24 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Efficiencyvs Vin @ DIM duty cycles = 10 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Efficiencyvs Vin @ DIM duty cycles = 50 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Efficiencyvs Vin @ DIM duty cycles = 75 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Efficiencyvs Vin @ DIM duty cycles = 100 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Working waveforms @ fDIM = 100 Hz, D = 1 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Working waveforms @ fDIM = 100 Hz, D = 10 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Working waveforms @ fDIM = 100 Hz, D = 50 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Working waveforms @ fDIM = 100 Hz, D = 80 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Working waveforms @ fDIM = 200 Hz, D = 1 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Working waveforms @ fDIM = 200 Hz, D = 20 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Working waveforms @ fDIM = 200 Hz, D = 50 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Working waveforms @ fDIM = 200 Hz, D = 80 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Working waveforms @ fDIM = 500 Hz, D = 1 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Working waveforms @ fDIM = 500 Hz, D = 50 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Working waveforms @ fDIM = 1 kHz, D = 1% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Working waveforms @ fDIM = 1 kHz, D = 50 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Working waveforms @ fDIM = 10 kHz, D = 1 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Working waveforms @ fDIM = 10 kHz, D = 50 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Working waveforms @ fDIM = 20 kHz, D = 1 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Working waveforms @ fDIM = 20 Hz, D = 50 %. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Output voltage ripple @ fDIM = 200 Hz, D = 1 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Output voltage ripple @ fDIM = 200 Hz, D = 20 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Output voltage ripple @ fDIM = 200 Hz, D = 50 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Output voltage ripple @ fDIM = 200 Hz, D = 80 % . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Shorted LED protection @ fDIM = 200 HzAll WLEDs connected . . . . . . . . . . . . . . . . . . . . 22 Shorted LED protection @ fDIM = 200 Hz1 WLED shorted . . . . . . . . . . . . . . . . . . . . . . . . 22 Shorted LED protection @ fDIM = 200 Hz2 WLEDs shorted . . . . . . . . . . . . . . . . . . . . . . . 22 Shorted LED protection @ fDIM = 200 Hz3 WLEDs shorted - ROW disabled . . . . . . . . . . 22 Open ROW detection @ fDIM = 200 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Simplified block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 AVCC filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 OVP threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Multiple device synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 External sync waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Poor phase margin (a) and properly damped (b) load transient responses . . . . . . . . . . . . 30 Load transient response measurement set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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List of figures Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. Figure 54. Figure 55. Figure 56. Figure 57.
PM6600
Main loop and current loop diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Effect of slope compensation on small inductor current perturbation(D > 0.5) . . . . . . . . . . 32 Soft-start sequence waveforms in case of floating ROWs . . . . . . . . . . . . . . . . . . . . . . . . . 33 fDIM enabling schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 VFQFPN-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Top layer critical signals components assembly and layout . . . . . . . . . . . . . . . . . . . . . . . . 45 Top side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Bottom side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Inductor current in DCM operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
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1
PM6600
Figure 1.
L VBOOST
D
VI N + C in
R1
C 13
Application circuit
R s lope
C out
23
8
19
AVC C SYN C 6 AVC C 9 OVSEL VI N C av c c 18 LX
R2
C 10
F AU LT C ldo5 7 LD O5 PGN D 17
R f ilt SLOPE
EN 22 F AU LT EN DIM MOD E 25 21 20 5
PM6600
16 15 14 13 12 11
Typical application circuit
DIM
AVC C 1 C OMP SS F SW SGN D 10 R bilim R I LI M BI LI M TH PD 24
R OW 6 R OW 5 R OW 4 R OW 3 R OW 2 R OW 1
SW 3
MOD E
4
2
R c om p AVC C SW 2 F SW R rilim
Css
C c om p
Rf sw
VI N -
3
Typical application circuit
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Pin settings
PM6600
2
2.1
Pin settings
Connections
Figure 2. Pin connection (through top view)
2.2
Pin description
Table 2.
N 1 2 3
Pin functions
Pin COMP RILIM BILIM Function Error amplifier output. A simple RC series between this pin and ground is needed to compensate the loop of the boost regulator. Output generators current limit setting. The output current of the ROWs can be programmed connecting a resistor to SGND. Boost converter current limit setting. The internal MOSFET current limit can be programmed connecting a resistor to SGND. Switching frequency selection and external sync input. A resistor to SGND is used to set the desired switching frequency. The pin can also be used as external synchronization input. See Section 7.3 on page 28 for details. Current generators fault management selector. It allows to detect and manage LEDs failures. See Section 9.2 on page 39 for details. +5 V analog supply. Connect to LDO5 through a simple RC filter. Internal +5 V LDO output and power section supply. Bypass to SGND with a 1 F ceramic capacitor. Input voltage. Connect to the main supply rail.
4
FSW
5 6 7 8
MODE AVCC LDO5 VIN
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PM6600 Table 2.
N
Pin settings Pin functions (continued)
Pin Function Slope compensation setting. A resistor between the output of the boost converter and this pin is needed to avoid sub-harmonic instability. Refer to section 1.4 for details. Signal ground. Supply return for the analog circuitry and the current generators. Row driver output #1. Row driver output #2. Row driver output #3. Row driver output #4. Row driver output #5. Row driver output #6. Power ground. Source of the internal power-MOSFET. Over-voltage selection. Used to set the desired OV threshold by an external divider. See Section 7.2 on page 27 for details. Switching node. Drain of the internal power-MOSFET. Dimming input. Used to externally set the brightness of the LEDs by using a PWM signal. Enable input. When low, the device is turned off. If tied high or left floating, the device is turned on and a soft-start sequence takes place. Fault signal output. Open drain output. The pin goes low when a fault condition is detected (see Section 9.1 on page 39 for details). Synchronization output. Used as external synchronization output. Soft-star t. Connect a capacitor to SGND to set the desired soft-start duration.
9
SLOPE
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SGND ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 PGND OVSEL LX DIM EN FAULT SYNC SS
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Electrical data
PM6600
3
3.1
Electrical data
Maximum rating
Table 3.
Symbol VAVCC VLDO5 AVCC to SGND LDO5 to SGND PGND to SGND VIN VLX VIN to PGND LX to SGND LX to PGND RILIM, BILIM, SYNC, OVSEL, SS to SGND EN, DIM, FSW, MODE, FAULT to SGND ROWx to PGND/ SGND SLOPE to VIN SLOPE to SGND Maximum LX RMS current PTOT Power dissipation @ = 25 C Maximum withstanding voltage range test condition: CDF-AEC-Q100-002- "human body model" acceptance criteria: "normal performance"
Absolute maximum ratings (1)
Parameter Value -0.3 to 6 -0.3 to 6 -0.3 to 0.3 -0.3 to 40 -0.3 to 40 -0.3 to 40 -0.3 to VAVCC + 0.3 -0.3 to 6 -0.3 to 40 VIN - 0.3 to VIN + 6 -0.3 to 40 2.0 2.3 2000 (2) A W V V Unit
1. Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2. +/- 2 kV all pins, except AVCC (pin 6), which withstands +/- 1.25 kV.
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PM6600
Electrical data
3.2
Thermal data
Table 4.
Symbol RthJA TSTG TJ TA
Thermal data
Parameter Thermal resistance junction to ambient Storage temperature range Junction operating temperature range Operating ambient temperature range Value 42 -50 to 150 -40 to 125 -40 to 85 Unit C/W C C C
3.3
Recommended operating conditions
Table 5.
Symbol
Recommended operating conditions
Values Parameter Min Typ Max Unit
Supply section VIN Input voltage range 4.7 28 V
Boost section VBST fSW Output voltage range Adjustable switching frequency FSW sync input duty-cycle Irowx ROWs output maximum current FSW connected to RFSW 200 36 1000 40 32 V kHz % mA
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Electrical characteristics
PM6600
4
Electrical characteristics
VIN = 12 V; TA = 0 C to 85 C and MODE connected to AVCC unless specified (1).
Table 6.
Symbol
Electrical characteristics
Values Parameter Test condition Min Typ Max Unit
Supply section VLDO5, VAVCC LDO output and IC supply voltage EN High, ILDO5 = 0 mA RRILIM = 51 k, RBILIM = 220 k, RSLOPE = 680 k DIM tied to SGND. EN low 4.6 5 5.5 V
IIN,Q
Operating quiescent current
1
mA
IIN,SHDN VUVLO,ON VUVLO,OFF
Operating current in shutdown LDO5 under voltage lockout upper threshold LDO5 under voltage lockout lower threshold
20 4.6 3.8 4.0
30 4.75
A
V
LDO linear regulator Line regulation LDO dropout voltage 6 V = VIN = 28 V, ILDO5 = 30 mA VIN = 4.3 V, ILDO5 = 10 mA VLDO5 > VUVLO,ON VLDO5 < VUVLO,OFF
1. TA = TJ. All parameters at operating temperature extremes are guaranteed by design and statistical analysis (not production tested)
25 mV 80 25 40 120 60 mA 30
LDO maximum output current limit
12/58
PM6600 Table 6.
Symbol
Electrical characteristics Electrical characteristics (continued)
Values Parameter Test condition Min Typ Max Unit
Boost section ton,min Minimum switching on time Default switching frequency Minimum FSW Sync frequency FSW sync Input low level threshold FSW sync Input hysteresis FSW sync Min ON time SYNC output duty-cycle SYNC output high level SYNC output low level Power switch KB LX current coefficient Internal MOSFET RDSon OV protections VTH,OVP VTH,FRD VOVP,FRD Over-voltage protection reference (OVSEL) threshold Floating ROWs detection (OVSEL) threshold Voltage gap between the OVP and FRD thresholds 1.190 1.100 1.235 1.145 90 1.280 1.190 V V mV RBILIM = 300 k 5.7e5 6.7e5 280 7.7e5 500 V m FSW connected to AVCC (Internal oscillator selected) ISYNC = 10 A ISYNC = -10 A VAVCC -20 mV 20 34 240 mV 60 270 40 ns % FSW connected to AVCC 570 660 210 200 750 kHz ns
13/58
Electrical characteristics Table 6.
Symbol
PM6600
Electrical characteristics (continued)
Values Parameter Test condition Min Typ Max Unit
Soft-start and power management EN, turn-on level threshold EN, turn-off level threshold DIM, high level threshold DIM, low level threshold EN, pull-up current SS, charge current SS, end-of-startup threshold SS, reduced switching frequency Release threshold Current generators section TDIM-ON,min KR IROWx VIFB VTH,FAULT VFAULT,LOW Minimum dimming on-time ROWs current coefficient accuracy ROWs current mismatch(1) Feedback regulation voltage Shor ted LED fault detection threshold FAULT pin low-level voltage IFAULT,SINK = 4 mA RRILIM = 51 k RRILIM = 51 k RRILIM = 51 k No LEDs mismatch 400 8.2 350 500 998 21 2 ns V % mV V mV 4 2 0.8 2.5 5 2.4 0.8 6 2.8 V A 0.8 V 1.3 1.6
Thermal shutdown TSHDN Thermal shutdown Turn-off temperature 150 C
Note:
The current mismatch is the maximum current difference among the ROWs of one device.
14/58
PM6600
Typical operating characteristics
5
Typical operating characteristics
All the measures are done with a standard PM6600EVAL demonstration board and a standard WLED6021NB tamboured, with the components listed in the EVAL_KIT document. The measures are done with this working conditions, unless specified:
Vin = 12 V Vout = 6 rows x 10 WLEDs = 34 V (typ) Iout = 20 mA each row fsw = 660 kHz (nominal switching frequency, with FSW .. AVCC) Vrow1 to Vrow6 = {0.697, 0.75, 0.818, 0.696, 0.822, 0.363} V Figure 4. Efficiency vs DIM duty cycle @ fDIM = 500 Hz
Figure 3.
Efficiency vs DIM duty cycle @ fDIM = 200 Hz
100 90 80 70 Efficiency [%]
Efficiency [%]
100 90 80 70 60 50 40 30 20 10 0 Vin = 6V Vin = 12V Vin = 18V Vin = 24V 0 20 40 60 80 100
60 50 40 30 20 10 0 0 20 40 60 80 100 DIM duty cycle [%] Vin = 6V Vin = 12V Vin = 18V Vin = 24V
DIM duty cycle [%]
Figure 5.
Efficiency vs DIM duty cycle @ fDIM = 1 kHz
Figure 6.
Efficiency vs DIM duty cycle @ fDIM = 5 kHz
100 90 80 70 Efficiency [%]
Effici ency [%]
100 90 80 70 60 50 40 30 20 10 0 Vin = 6V Vin = 12V Vin = 18V Vin = 24V
60 50 40 30 20 10 0 0 20 40 60 80 100 DI M duty cycle [%] Vin = 6V Vin = 12V Vin = 18V Vin = 24V
0
20
40
60
80
100
DI M duty cycle [%]
15/58
Typical operating characteristics Figure 7. Efficiency vs DIM duty cycle @ fDIM = 10 kHz Figure 8.
PM6600 Efficiency vs DIM duty cycle @ fDIM = 20 kHz
100 90 80 70 Efficiency [%]
Efficiency [%]
100 90 80 70 60 50 40 30 20 10 0 Vin = 6V Vin = 12V Vin = 18V Vin = 24V 0 20 40 60 80 100
60 50 40 30 20 10 0 0 20 40 60 80 100 DIM duty cycle [%] Vin = 6V Vin = 12V Vin = 18V Vin = 24V
DIM duty cycle [%]
Figure 9.
100 90 80 70 Efficiency [%] 60 50
Efficiency vs DIM duty cycle @ Vin = 8 V
Figure 10. Efficiency vs DIM duty cycle @ Vin = 12 V
100 90 80 70 Effici ency [%] 60 50 40 30 20 10
100
fDIM = 200Hz 40 30 20 10 0 0 20 40 60 80 DI M duty cycle [%] fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
fDIM = 200Hz fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz 0 20 40 60 80 100
0 DI M duty cycle [%]
Figure 11. Efficiency vs DIM duty cycle @ Vin = 18 V
100 90 80 70 Effi ciency [%] 60 50 40 30 20 10 0 0 20 40 60 80 100 DIM duty cycle [%] fDIM = 200Hz fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
Figure 12. Efficiency vs DIM duty cycle @ Vin = 24 V
100 90 80 70 Efficiency [%] 60 50 fDIM = 200Hz 40 30 20 10 0 0 20 40 60 80 100 DI M duty cycle [%] fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
16/58
PM6600
Typical operating characteristics
Figure 13. Efficiency vs Vin @ DIM duty cycles = 10 %
100 90 80 70 Effi ciency [%]
Figure 14. Efficiency vs Vin @ DIM duty cycles = 50 %
100 90 80 70 Efficiency [%] 60 50 40 30 20 10 0 fDIM = 200Hz fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
60 50 40 30 20 10 0 6 12 Vin [V] 18 24 fDIM = 200Hz fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
6
12 Vin [V]
18
24
Figure 15. Efficiency vs Vin @ DIM duty cycles = 75 %
96 94 92 E fficiency [%] 90 fDIM = 200Hz 88 86 84 82 6 12 Vin [V] 18 24 fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
Figure 16. Efficiency vs Vin @ DIM duty cycles = 100 %
95 94 93
E fficiency [%]
92 91 90 89 88 87 6 12 Vin [V] 18 24 fDIM = 200Hz fDIM = 500Hz fDIM = 1kHz fDIM = 5kHz fDIM = 10kHz fDIM = 20kHz
17/58
Typical operating characteristics
PM6600
Figure 17. Working waveforms @ fDIM = 100 Hz, D = 1 %
Figure 18. Working waveforms @ fDIM = 100 Hz, D = 10 %
Figure 19. Working waveforms @ fDIM = 100 Hz, D = 50 %
Figure 20. Working waveforms @ fDIM = 100 Hz, D = 80 %
18/58
PM6600 Figure 21. Working waveforms @ fDIM = 200 Hz, D = 1 %
Typical operating characteristics Figure 22. Working waveforms @ fDIM = 200 Hz, D = 20 %
Figure 23. Working waveforms @ fDIM = 200 Hz, D = 50 %
Figure 24. Working waveforms @ fDIM = 200 Hz, D = 80 %
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Typical operating characteristics Figure 25. Working waveforms @ fDIM = 500 Hz, D = 1 % Figure 26. Working waveforms @ fDIM = 500 Hz, D = 50 %
PM6600
Figure 27. Working waveforms @ fDIM = 1 kHz, D = 1%
Figure 28. Working waveforms @ fDIM = 1 kHz, D = 50 %
20/58
PM6600 Figure 29. Working waveforms @ fDIM = 10 kHz, D = 1 %
Typical operating characteristics Figure 30. Working waveforms @ fDIM = 10 kHz, D = 50 %
Figure 31. Working waveforms @ fDIM = 20 kHz, D = 1 %
Figure 32. Working waveforms @ fDIM = 20 Hz, D = 50 %
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Typical operating characteristics Figure 33. Output voltage ripple @ fDIM = 200 Hz, D = 1 % Figure 34. Output voltage ripple @ fDIM = 200 Hz, D = 20 %
PM6600
Figure 35. Output voltage ripple @ fDIM = 200 Hz, D = 50 %
Figure 36. Output voltage ripple @ fDIM = 200 Hz, D = 80 %
22/58
PM6600 Figure 37. Shorted LED protection @ fDIM = 200 Hz all WLEDs connected
Typical operating characteristics Figure 38. Shorted LED protection @ fDIM = 200 Hz 1 WLED shorted
Figure 39. Shorted LED protection @ fDIM = 200 Hz 2 WLEDs shorted
Figure 40. Shorted LED protection @ fDIM = 200 Hz 3 WLEDs shorted - ROW disabled
23/58
Typical operating characteristics Figure 41. Open ROW detection @ fDIM = 200 Hz
PM6600
24/58
PM6600
Block diagram
6
Block diagram
Figure 42. Simplified block diagram
VIN
SLOPE
Current Sense
LDO5
+5V LDO
Ramp Generator ++
ZCD
LX
UVLO Detector UVLO + gm _
+ _
Boost Control Logic 0.4V
COMP BILIM SS
Current Limit
PGND
Boost_EN _ FRD + + _ 1.143V
OVSEL
1.235V
OVP Soft Start Min Voltage Selector VROW6
CTRL6
Prot_EN
Current Generator 6 Current Generator 5 Current Generator 4 Current Generator 3 Current Generator 2
ROW6 ROW5 ROW4 ROW3 ROW2
SYNC
Ext Sync Detector
÷2
VROW5
CTRL5
VROW4 OSC
CTRL4
VROW3
FSW
Prot_EN
CTRL3
VROW2
CTRL2
AVCC EN MO D E
CONTROL LOGIC
Boost_EN UVLO CTRL6 CTRL5 CTRL4 CTRL3 CTRL2
8.2V
VTH,FLT
CTRL1
LOGIC
VROW1
FAULT DIM
Thermal Shutdown
OVP FRD
+ _ I to V
ROW1
I to V 1.2V Current Generator 1
RILIM
SGND
25/58
Operation description
PM6600
7
7.1
7.1.1
Operation description
Boost section
Functional description
The PM6600 is a monolithic LEDs driver for the backlight of LCD panels and it consists of a boost converter and six PWM-dimmable current generators. The input voltage range is from 4.7 V up to 28 V. The boost section is based on a constant switching frequency, Peak Current-Mode architecture. The boost output voltage is controlled such that the lowest ROWs' voltage, referred to SGND, is equal to an internal reference voltage (400 mV typ.). In addition, the PM6600 has an internal LDO that supplies the internal circuitry of the device and is capable to deliver up to 40 mA. The input of the LDO is the VIN pin. The LDO5 pin is the LDO output and the supply for the power-MOSFET driver at the same time. The AVCC pin is the supply for the analog circuitry and should be connected to the LDO output through a simple RC filter, in order to improve the noise rejection.
Figure 43. AVCC filtering
VIN
LDO5
Rfilt 4R7
LDO
PM6600
AVCC
Cavcc 100n
SGND
Two loops are involved in regulating the current sunk by the generators. The main loop is related to the boost regulator and uses a constant frequency peak currentmode architecture (see Figure 49), while an internal current loop regulates the same current at each ROW according to the set value (RILIM pin). A dedicated circuit automatically selects the lowest voltage drop among all the ROWs and provides this voltage the main loop that, in turn, regulates the output voltage. In fact, once the reference generator has been detected, the error amplifier compares its voltage drop to the internal reference voltage and varies the COMP output. The voltage at the COMP pin determines the inductor peak current at each switching cycle. The output voltage of the boost regulator is thus determined by the total forward voltage of the LEDs strings:
Equation 1
VOUT = max (
i=1 NROWS mLEDS
j=1
VF,j ) + 400mV
26/58
PM6600
Operation description
where the first term represents the highest total forward voltage drop over active ROWs and the second is the voltage drop across the leading generator (400 mV typ.). The device continues to monitor the voltage drop across all the rows and automatically switches to the current generator having the lowest voltage drop.
7.2
Over voltage protection
An adjustable over-voltage protection is available. It can be set feeding the OVSEL pin with a partition of the output voltage. The voltage of the central tap of the divider is thus compared to a fixed 1.235 V threshold. When the voltage on the OVSEL pin exceeds the OV threshold, the FAULT pin is tied low (see Section 9 on page 39) and the device is turned off; this condition is latched and the PM6600 is restarted by toggling the EN pin or by performing a power-on reset (the POR occurs when the LDO output falls below the lower UVLO threshold and subsequently crosses the upper UVLO threshold during the rising phase of the input voltage). Normally, the value of the high-side resistors of the divider is in the order of 100k to reduce the output capacitor discharge when the boost converter is off (during the off phase of the dimming cycle). The OVSEL divider should be a compensated one, with the capacitors C10 (typically in the 100 pF-330 pF range) that improves noise rejection at the OVSEL pin (see Figure 44) and C13 (typically 22 pF) that avoids OVP fault detection when a row is open. The following formulas permit to properly select the OVP threshold, according to the VOUT value and considering the worst case (maximum VF_WLED):
Equation 2
VOUT max + 3V < VOVP < VOUT + VOUT max + 4.5V)
Equation 3
VOUTmax = nWLED series VF _ WLED ax + 0.4V _ m
VOUTmax is the maximum output voltage considering the LED spread. VOVP is the over-voltage protection threshold The formula to choose the proper values for the resistors of the OVP divider is:
Equation 4
VOVP R 1 = R 2 ----------------------- 1.235 1
Equation 5
R2 C 13 = 1.5 C 10 -----R1
27/58
Operation description Figure 44. OVP threshold setting
V IN V O UT
PM6600
C13 LX R1 CO U T
PM 660 0
OVSEL R2 SGND C 10
7.3
Switching frequency selection and synchronization
The switching frequency of the boost converter can be set in the 200 kHz-1 MHz range by connecting the FSW pin to ground through a resistor. Calculation of the setting resistor is made using equation 3 and should not exceed the 80 k-400 k range.
Equation 6
RFSW = fSW 2.5
In addition, when the FSW pin is tied to AVCC, the PM6600 uses a default 660 kHz fixed switching frequency, allowing to save a resistor in minimum components-count applications.
Figure 45. Multiple device synchronization
MASTER AVCC
SLAVE
Sync Out FSW SYNC FSW SYNC SYNC
PM6600
RFSW SGND
PM6600
SGND
The FSW pin can also be used as a synchronization input, allowing the PM6600 to operate both as master or slave device. If a clock signal with a 210 kHz minimum frequency is applied to this pin, the device locks synchronized (300 mV threshold). An Internal time-out allows synchronization as long as the external clock frequency is greater than 210 kHz. Keeping the FSW pin voltage lower than 300 mV for more than 1/210 kHz 5 s results in the device turn off. Normal operation is resumed as soon as FSW rises above the mentioned threshold and the soft-start sequence is repeated.
28/58
PM6600
Operation description
The SYNC pin is a synchronization output and provides a 34 % (typ.) duty-cycle clock when the PM6600 is used as master or a replica of the FSW pin when used as slave. It is used to connect multiple devices in a daisy-chain configuration or to synchronize other switching converters running in the system with the PM6600 (master operation). When an external synchronization clock is applied to the FSW pin, the internal oscillator is over-driven: each switching cycle begins at the rising edge of clock, while the slope compensation ramp starts at the falling edge of the same signal. Thus, the external synchronization clock is required to have a 40 % maximum duty-cycle when the boost converter is working in continuous-conduction mode (CCM). The minimum pulse width which allows the synchronizing pulses to be detected is 270 ns.
Figure 46. External sync waveforms
FSW pin voltage (ext. sync) 300mV threshold
270ns minimum
Slave SYNC pin voltage
Slave LX pin voltage
29/58
Operation description
PM6600
7.4
System stability
The boost section of the PM6600 is a fixed frequency, peak current-mode converter. During normal operation, a minimum voltage selection circuit compares all the voltage drops across the active current generators and provides the minimum one to the error amplifier. The output voltage of the error amplifier determines the inductor peak current in order to keep its inverting input equal to the reference voltage (400 mV typ). The compensation network consists of a simple RC series (RCOMP - CCOMP) between the COMP pin and ground. The calculation of RCOMP and CCOMP is fundamental to achieve optimal loop stability and dynamic performance of the boost converter and is strictly related to the operating conditions.
7.4.1
Loop compensation
The compensation network can be quickly calculated using equations 4 through 9. Once both RCOMP and CCOMP have been determined, a fine-tuning phase may be required in order to get the optimal dynamic performance from the application. The first parameter to be fixed is the switching frequency. Normally, a high switching frequency allows reducing the size of the inductor but increases the switching losses and negatively affects the dynamic response of the converter. For most of applications, the fixed value (660 kHz) represents a good trade-off between power dissipation and dynamic response, allowing to save an external resistor at the same time. In low-profile applications, the inductor value is often kept low to reduce the number of turns; an inductor value in the 4.7 H-15 H range is a good starting choice. Even if the loop bandwidth of the boost converter should be chosen as large as possible, it should be set to 20 % of the switching frequency, taking care not to exceed the CCM-mode Right Half-Plane Zero (RHPZ).
Equation 7
fU 0.2 fSW
Equation 8
VIN,min VOUT V 2 MR OUT IOUT fU 0.2 = 0.2 2 L 2 L
2
Where VIN,min is the minimum input voltage, IOUT is the overall output current,
M=
VIN,min VOUT
R=
VOUT IOUT
Note that, the lower the inductor value (or the lower the switching frequency) the higher the bandwidth can be achieved. The output capacitor is directly involved in the loop of the boost converter and must be large enough to avoid excessive output voltage drop in case of a sudden line transition from the maximum to the minimum input voltages (VOUT should not exceed 50-100 mV):
30/58
PM6600 Equation 9
VOUT = V IOUT 1 - IN _ MIN 2 fU C VIN _ MAX
Operation description
Once the output capacitor has been chosen, the RCOMP can be calculated as:
Equation 10
R COMP = Where GM = 2.7 S and gEA = 375 S. The CCOMP capacitor is determined to place the frequency of the compensation zero 5 times lower than the loop bandwidth: 2 fU C GM gEA M
Equation 11
C COMP = Where fZ = fU / 5. The close loop gain function (GLOOP) is thus given by equation 10: 1 2 fZ R COMP
Equation 12
1 R COMP + sC COMP L 1- s 2 MR RM 1 + sRC
GLOOP = GM gEA
A simple technique to optimize different applications is to replace RCOMP with a 20 k trimmer and adjust its value to properly damp the output transient response. Insufficient damping will result in excessive ringing at the output and poor phase margin. Figures 5a and 5b give an example of compensation adjustment for a typical application.
Figure 47. Poor phase margin (a) and properly damped (b) load transient responses
31/58
Operation description Figure 48. Load transient response measurement set-up
VIN= 6V 6.8H VBST=30÷36V
PM6600
CIN
4.7F MLCC
+5V
AVCC
VIN
SLOPE
OVSEL
LX
LDO5 BILIM RILIM SS COMP SGND DIM
FSW ROW1 ROW2
RL =
VBST 50mA
PM6600
ROW3 ROW4 ROW5 ROW6 PGND
FAULT
MODE
SYNC
EN
Up to 10 WLEDs per row
500Hz
7.4.2
Slope compensation
The constant frequency, peak current-mode topology has the advantage of very easy loop compensation with output ceramic capacitors (reduced cost and size of the application) and fast transient response. In addition, the intrinsic peak-current measurement simplifies the current limit protection, avoiding undesired saturation of the inductor. On the other side, this topology has a drawback: there is inherent open loop instability when operating with a duty-ratio greater than 0.5. This phenomenon is known as "sub-harmonic instability" and can be avoided by adding an external ramp to the one coming from the sensed current. This compensating technique, based on the additional ramp, is called "Slope Compensation". In figure 11, where the switching duty-cycle is higher than 0.5, the small perturbation IL dies away in subsequent cycles thanks to the slope compensation and the system reverts to a stable situation.
Figure 49. Main loop and current loop diagram
VIN
LX
ROWx
PWM
Minimum voltage drop selector
SGND
RILIM
COMP
gm
0.4V
32/58
PM6600
Operation description
The SLOPE pin allows to properly set the amount of slope compensation connecting a simple resistor RSLOPE between the SLOPE pin and the output. The compensation ramp starts at 35 % (typ.) of each switching period and its slope is given by the following equation:
Equation 13
V - VIN - VBE SE = K SLOPE OUT R SLOPE
Where KSLOPE, VBE = 2 V (typ.) and SE is the slope ramp in [A/s]. To avoid sub-harmonic instability, the compensating slope should be at least half the slope of the inductor current during the off-phase for a duty-cycle greater than 50 % (i.e. at the lowest input voltage). The value of RSLOPE can be calculated according to equation 9.
Equation 14
R SLOPE 2 K SLOPE L (VOUT - VIN - VBE ) (VOUT - VIN )
Figure 50. Effect of slope compensation on small inductor current perturbation (D > 0.5)
Inductor current (CCM) 0.35·TSW
Programmed inductor peak current with slope compensation (SE)
I TRIP
IL
Inductor current perturbation
TS W
t
7.5
Soft-start
The soft-start function is required to perform a correct start-up of the system, controlling the inrush current required to charge the output capacitor and to avoid output voltage overshoot. The soft-start duration is set connecting an external capacitor between the SS pin and ground. This capacitor is charged with a 5 A constant current, forcing the voltage on the SS pin to ramp up. When this voltage increases from zero to nearly 1.2 V, the current limit of the power-MOSFET is proportionally released to its final value. In addition, during the initial part of the Soft-Start, the switching frequency of the boost converter is reduced to half of the
33/58
Operation description
PM6600
nominal value to permit to use inductors with lower saturation current value; the nominal switching frequency is restored after the SS pin voltage has crossed 0.8 V. In this mode, the current runaway is avoided.
Figure 51. Soft-start sequence waveforms in case of floating ROWs
OVP Floating ROWs detection
Vth,FRD= 93% of OVP
Output voltage
AVCC 2.4V 1.2V 0.8V
SS pin voltage
Protections turn active Nominal switching frequency release
tss
100% Current limit
EN pin voltage
t
During the soft-start phase it is also performed the floating ROWs detection. In presence of one or more floating ROWs, the error amplifier is unbalanced and the output voltage increases; when it reaches the floating ROW Detection (FRD) threshold (93 % of the OVP threshold), the floating ROWs are managed according to Table 8 (see Section 9 on page 39). After the SS voltage reaches a 2.4 V threshold, the start-up finishes and all the protections turn active. The soft-start duration can be calculated with the following formula:
Equation 15
t SS 2.5 C SS ISS
Where ISS = 5 A. Please refer to the application note section for the CSS value settings according to the different working conditions.
34/58
PM6600
Operation description
7.6
Boost current limit
The design of the external components, especially the inductor and the flywheel diode, must be optimized in terms of size relying on the programmable peak current limit. The PM6600 improves the reliability of the final application giving the way to limit the maximum current flowing into the critical components. A simple resistor connected between the BILIM pin and ground sets the desired value. The voltage at the BILIM pin is internally fixed to 1.2 V and the current limit is proportional to the current flowing through the setting resistor, according to the following equation:
Equation 16
IBOOST,PEAK = where K B = 6.7 10 5 V 15% . The maximum allowed current limit is 5 A, resulting in a minimum setting resistor RBILIM > 120 k. The maximum guaranteed RMS current in the power switch is 2 Arms. The current limitation works by clamping the COMP pin voltage proportionally to RBILIM. Peak inductor current is limited to the above threshold decreased by the slope compensation contribution. In a boost converter the r.m.s. current through the internal MOSFET depends on both the input and output voltages, according to equations 15a (DCM) and 15b (CCM). KB RBILIM
Equation 17 a
IMOS,rms = VIN D D FSW L 3
Equation 17 b
IMOS,rms = IOUT
2 D VOUT 1 (D(1 - D))3 + (1 - D)2 12 I OUT fSW L
7.7
Enable function
The PM6600 is enabled by the EN pin. This pin is active high and, when forced to SGND, the device is turned off. This pin is connected to a permanently active 2 A current source; when sudden device turn-on at power-up is required, this pin must be left floating or connected to a delay capacitor. When turned off, the PM6600 quickly discharges the SoftStar t capacitor and turns off the power-MOSFET, the current generators and the LDO. The power consumption is thus reduced to 20 A only. The proper startup sequence is DIM ' VIN ' EN, or VIN ' DIM ' EN. If the dimming signal is applied after the EN pin, the device will not perform the soft-start again, in fact it will start switching with the maximum current limit in order to recover the output voltage. In applications where the dimming signal is used to turn on and off the device, the EN pin can be connected to the DIM pin as shown in Figure 52.
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Operation description Figure 52. fDIM enabling schematic
PM6600
DIM BAS69 EN 220 k 100n SGND
PM6600
7.8
Thermal protection
In order to avoid damage due to high junction temperature, a thermal shutdown protection is implemented. When the junction temperature rises above 150 C (typ.), the device turns off both the control logic and the boost converter and holds the FAULT pin low. In order to turn on the device again, it is possible to perform a POR (power on reset) once the junction temperature has been reduced by 30 C.
36/58
PM6600
Backlight driver section
8
8.1
Backlight driver section
Current generators
The PM6600 is a LEDs driver with six channels (ROWs); each ROW is able to drive multiple LEDs in series (max. 40 V) and to sink up to 32 mA maximum current, allowing to manage different kinds of LEDs. The LEDs current can be set by connecting an external resistor (RRILIM) between the RILIM pin and ground. The voltage across the RILIM pin is internally set to 1.2 V and the ROWs current is proportional to the RILIM current according to the following equation:
Equation 18
IROWx = Where KR = 998 21 V ( 2.1 %). The current accuracy between the ROWs of more than one device is, consequently: KR RRILIM
Equation 19
IROW,MAX = IROW,MIN =
IROW _ KR =1019 - IROW _ KR =998 IROW _ KR =998 IROW _ KR =977 - IROW _ KR =998 IROW _ KR =998
+ 2.1%
- 2. 1%
In the table below there are the maximum, typical and minimum IROW values versus the RRILIM:
Table 7.
IROW values versus RRILIM
RRILIM IROW @ KR = 977 20.79 mA 19.58 mA 19.16 mA IROW @ KR = 998 21.68 mA 20.00 mA 19.57 mA IROW @ KR = 1019 21.68 mA 20.42 mA 19.98 mA
47.0 k 49.9 k 51.0 k
The maximum current mismatch between the ROWs of one device is 2 % @ IROWx = 20 mA, according to the formula:
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Backlight driver section Equation 20
IROWx,max = IROWx,min = IROW _ max - IROW _ mean IROW _ mean IROW _ min - IROW _ mean IROW _ mean
i=1
PM6600
+ 2%
- 2%
IROW _ mean =
IROWi 6
6
Due to the spread of the LEDs' forward voltage, the total drop across the LED's strings will be different. The device will manage the unconnected ROWs according to the MODE pin setting (see Table 8).
8.2
PWM dimming
The brightness control of the LEDs is performed by a pulse-width modulation of the ROWs current. When a PWM signal is applied to the DIM pin, the current generators are turned on and off mirroring the DIM pin behavior. Actually, the minimum dimming duty-cycle depends on the dimming frequency. The real limit to the PWM dimming is the minimum on-time that can be managed for the current generators; this minimum on-time is approximately 500 ns. Thus, the minimum dimming duty-cycle depends on the dimming frequency according to the following formula:
Equation 21
DDIM,min = 500ns fDIM
For example, at a dimming frequency of 20 kHz, 1% of dimming duty-cycle can be managed. The device can manage the condition fDIM = 0 Hz. However, in order to avoid any flickering issue due to the human eye cutoff frequency, we recommend to use fDIM > 100 Hz (condition verified with discrete smd leds without any light guide). The fDIM maximum value has to be 1/10 of the selected Fsw. During the off-phase of the PWM signal the boost converter is paused, the current generators are turned off and the output voltage is frozen across the output capacitor. During the start-up sequence the dimming duty-cycle is forced to 100 % to detect floating ROWs regardless of the applied dimming signal.
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PM6600
Fault management
9
Fault management
The main loop keeps the ROW having the lowest voltage drop regulated to about 400 mV. This value slightly depends on the voltage across the remaining active ROWs. After the softstar t sequence, all protections turn active and the voltage across the active current generators is monitored to detect shorted LEDs.
9.1
FAULT pin
The FAULT pin is an open-collector output, active low, which gives information regarding faulty conditions eventually detected. This pin can be used either to drive a status LED (with a series resistor to not exceed 4 mA current) or to warn the host system. The FAULT pin status is strictly related to the MODE pin setting (see Table 8 for details).
9.2
MODE pin
The MODE pin is a digital input and can be connected to AVCC or SGND in order to choose the desired fault detection and management. The PM6600 can manage a faulty condition in two different ways, according to the application needs. Table 8 summarizes how the device detects and handles the internal protections related to the boost section (over-current, overtemperature and over-voltage) and to the current generators section (open and shorted LEDs).
Table 8.
Faults management summary
FAULT MODE to GND FAULT pin HIGH power-MOS turned OFF FAULT pin LOW device turned OFF latched FAULT pin LOW device turned OFF latched FAULT pin LOW faulty ROW DISABLED VTH,FAULT = 8.2 V FAULT pin LOW device latched OFF VTH,FAULT = 8.2 V FAULT pin LOW faulty ROW DISABLED FAULT pin LOW device latched OFF FAULT pin LOW device latched OFF VTH,FAULT = 8.2 V MODE to VCC FAULT pin HIGH power-MOS turned OFF FAULT pin LOW device turned OFF latched FAULT pin LOW device turned OFF latched FAULT pin LOW faulty ROW DISABLED VTH,FAULT = 8.2 V FAULT pin LOW faulty ROWs DISABLED VTH,FAULT = 8.2 V FAULT pin HIGH faulty ROW DISABLED FAULT pin HIGH faulty ROWs DISABLED FAULT pin LOW faulty ROWs DISABLED VTH,FAULT = 8.2 V
Internal MOSFET over current Output over voltage Thermal shutdown
Shor ted LEDs on a single row
Shor ted LEDs on more rows
Open row More than one open rows Open rows plus shorted led (different rows)
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Fault management
PM6600
9.3
Open LED fault
In case a ROW is not connected or a LED fails open, the device has two different behaviors according to the MODE pin status. If the MODE pin is high (connected to AVCC), the open ROW is excluded from the control loop and the device continues to work properly with the remaining ROWs, without asserting the FAULT pin. Connecting the MODE pin to SGND, the PM6600 behaves in a different manner: as soon as one open ROW is detected, the FAULT pin is tied low. In case a second open ROW is detected, the device is turned off. The internal logic latches this status: to restore the normal operation, the device must be restarted by toggling the EN pin or performing a power on reset (POR occurs when the voltage at the LDO5 pin falls below the lower UVLO threshold and subsequently rises above the upper one). As a consequence, If less than six ROWs are used in the application, the MODE pin must be set high.
9.4
Shorted LED fault
When a LED is shorted, the voltage across the related current generator increases of an amount equal to the missing voltage drop of the faulty LED. Since the feedback voltage on each active generator is constantly compared with a fixed fault threshold VTH,FAULT = 8.2 V, the device detects the faulty condition and acts according to the MODE pin status. In case the MODE pin is connected to AVCC, the PM6600 disconnects the ROWs whose voltage is higher than the threshold and the FAULT pin is tied low. This option is also useful to avoid undesired triggering of the shorted-LED protection simply due to the high voltage drop spread across the LEDs. If the MODE pin is low, when the voltage across one ROW is higher than VTH,FAULT threshold, the FAULT pin is set low and that ROW is disabled. If the voltage of a second ROW becomes higher than VTH,FAULT threshold, the device is turned off. The internal logic latches this status until the EN pin is toggled or a POR is performed.
9.5
Intermittent connection
For intermittent connection it is intended the condition where the flat cable connector from the leds backlight driver to the leds can have some issues on moving the panel of the notebook. This kind of issue is represented as an intermittent connection, that means the physical electrical connection between the ROWx pins of the PM6600 device and the White LEDs can be open for a while. The device will detect an open row fault. There is one possible solution to determine whether the fault is due to the intermittent connection or to a broken persistent electrical connection (open circuit). Since the device disables the open rows during the intermittent connection, one possible solution is, on the customer side, to toggle the EN pin and verify if the fault condition is still present. In fact, once you disconnect one row, it will result as a off-row (Fault -> open row, latched). When you connect it again, it is as a shorted led (Vrow higher than the threshold). This is because the short led detection is still active.
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PM6600
Fault management
If the fault disappears after toggling the EN pin, it means that the connection is again on and the problem can be detected as a previous intermittent connection. If the fault persists also after toggling the EN pin, it means that the problem is on the leds (one or more open leds) or on the flat cable or the cable connector (broken wire). The resultant Fault Management table will be:
Table 9.
Intermittent connection faults management summary
FAULT MODE to GND FAULT pin HIGH power-MOS turned OFF FAULT pin LOW device turned OFF latched FAULT pin LOW device turned OFF latched FAULT pin LOW faulty ROW DISABLED VTH,FAULT = 8.2 V FAULT pin LOW device latched OFF VTH,FAULT = 8.2 V FAULT pin LOW faulty ROW DISABLED FAULT pin LOW device latched OFF FAULT pin LOW device latched OFF VTH,FAULT = 8.2 V MODE to VCC FAULT pin HIGH power-MOS turned OFF FAULT pin LOW device turned OFF latched FAULT pin LOW device turned OFF latched FAULT pin LOW faulty ROW DISABLED VTH,FAULT = 8.2 V FAULT pin LOW faulty ROWs DISABLED VTH,FAULT = 8.2 V FAULT pin LOW faulty ROW DISABLED FAULT pin LOW faulty ROWs DISABLED FAULT pin LOW faulty ROWs DISABLED VTH,FAULT = 8.2 V
Internal MOSFET over current Output over voltage Thermal shutdown
Shor ted LED on a single row
Shor ted LEDs on more row
Open row More than one open rows Open row plus shorted LED (different rows)
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Package mechanical data
PM6600
10
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Table 10.
VFQFPN-24 mechanical data
Min 0.80 0.00 Typ 0.90 0.02 0.20 0.18 3.85 2.40 3.85 2.40 0.25 4.00 2.50 4.00 2.50 0.50 0.30 0.40 0.50 0.08 0.30 4.15 2.60 4.15 2.60 Max 1.00 0.05
Dim. A A1 A3 b D D2 E E2 e L ddd
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PM6600 Figure 53. VFQFPN-24 mechanical data
Package mechanical data
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Layout guidelines
PM6600
Appendix A
A.1
Layout guidelines
Basic points:
The device thermal pad is SGND. The device has 2 GND pins: SGND and PGND
A.1.1
GNDs planes - 1 device
If the pcb has 2 layers, the PGND area has to be in the top layer, together with the LX area and the Vin and Vout area, in order to reduce the number of the vias. The SGND plane is the bottom layer of the board and it is also present near the signal components on the top layer. The SGND and PGND connection can be made using the thermal pad of the device. If the pcb has 4 layers, the PGND and SGND planes must be separated into 2 different layers. Moreover, they must be connected together in only 1 point, near the PGND pin of the device. It is recommended to duplicate the LX area into one inner layer, to reduce the impedance and improve the noise rejection immunity of the device. If the PM6600 device is mounted on a more complex demonstration board (ex. RGB, multidevice application, LCD driver + backlight driver board), the PGND and SGND connection should be present only near the PGND pin of the device. This is relevant in complex systems because of the possible cross-talking noise between each block of the system. In order to connect together the PGND and SGND nets, it is not advisable to use a 0 resistor, because it can produce a voltage drop between the two GNDs planes and it may damage the device. It is preferable to connect together the PGND and SGND to the thermal pad of the device, or with a short pcb trace near the PGND pin of the device.
A.1.2
GNDs planes - 3 devices (RGB)
The SGND plane is the same for all the PM6600 devices bottom layer (or internal 2-3). Each PM6600 device must have its own PGND area (top layer), connected to the main SGND in one point, near the PGND pin of each device > totally 3 connections between the SGND and PGND, 1 for each driver: PGND_red - SGND; PGND_blue - SGND; PGND_green - SGND.
A.2
Compensation network
The components Rcomp Ccomp of the compensation network should be as close as possible to the COMP pin of the device. This permits to avoid any noise issue - instability of the compensation. This PCB trace should be designed in the opposite side of the device respect to the power area (according to the pins position). This subdivision improves the noise rejection of the system and permits to have a stable loop.
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PM6600
Layout guidelines
Take care not to design the LX switching copper area near the COMP network, in order to avoid cross-talking between the power switching signal and the compensation one. A very important thing is to keep the feedbacks (ROWs) and compensation traces as short as possible to minimize noise pick up and to keep them away from noise or field sources (the switch, diode, inductor). The feedbacks and compensation traces should never pass under the inductor, switch or diode (even if on opposite sides of the PCB). They should not run close to and parallel to a noisy (power critical) trace.
A.3
LX area vout power area
The LX Switching node area should be properly dimensioned large and short enough to assure a noise-free working. The power loop of LX, inductor, PGND must be as short as possible, by mounting L, D, Cout as close as possible one each other. The power area should be positioned away from the critical signals (mainly the compensation network). The L, D, Cout components are in the power critical path. The Cin position is less important than the L, D, Cout. However, it is preferable to have all the power components in the same side of the device, to reduce the power path length and to avoid noise coupling between power and signal traces.
A.4
Overvoltage divider
Since the PM6600 works with a compensated divider connected to the OVSEL pin to set the Overvoltage threshold, the two capacitors should be mounted as close as possible to the OVSEL pin of the device. Then you can choose the resistors position near of them. In the standard PM6600 demonstration board, the capacitors and resistors position is swapped. This was done because of the need to test the application in different working conditions. The capacitors have the priority in the positioning because they clean the OVSEL signal of the noise caused by the LX switching node.
A.5
LDO5 AVCC filter
The 2 capacitors should be mounted as close as possible to the LDO5 and VCC pins of the device. The resistor has to be mounted near of them or it can be omitted (short) where the PCB dimensions are very small.
A.6
ROWs current generators
The ROWs current generators are referred to SGND. In order to assure the best performances for current accuracy/mismatch the PCB traces lengths from the ROWs pins to the LEDs should be the same for all the current generators.
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Layout guidelines
PM6600
A.7
Top layer of the standard PM6600 demonstration board
While referring to the PM6600EVAL_EN demonstration board, the PGND and SGND connections are more than one. In this case the PGND and SGND areas are separated in the top layer (see Figure 1), while the bottom layer of the demonstration board is a unique GND plane connected to SGND and PGND with the vias on the thermal pad and the vias inside the test points. Since the PM6600EVAL_EN demonstration board is an isolated system, there are no crosstalking issues between the GNDs areas. When the device is mounted on a LCD board, together with other devices (digital, analog and power ones), it is very important to properly follow the layout guidelines listed above, in order to dedicate to each device the PGND and SGND portion of the entire board. In the picture below:
COMP > green Vin > dark blu LX > blu Vout > light blu PGND > light yellow SGND > dark yellow
Figure 54. Top layer critical signals components assembly and layout
Signal components
Power components
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PM6600
Layout guidelines
The following pictures are the gerber files of the PM6600EVAL_EN board.
Figure 55. Top side
1.1 cm
3 cm
Figure 56. Bottom side
Vias specs: diameter 0.8 mm, hole 0.3 mm
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Application note
PM6600
Appendix B
B.1
Application note
Inductor selection
Being the PM6600 mostly dedicated to notebook backlighting, real-estate applications dictate severe constrain in selecting the optimal inductor. The inductor choice must take into account different parameters like conduction losses (DCR), core losses (ferrite or ironpowder), saturation current and magnetic-flux shielding (core shape and technology). The switching frequency of the PM6600 can be set in the 200 kHz-1 MHz range, allowing a wide selecting room for the inductance value. Low switching frequencies takes to high inductance value, resulting in significant DCR and size. On the other hand, high switching frequencies result in significant core losses. The suggested range is 4.7-22 H, even if the best trade off between the different loss contributions varies from manufacturer to manufacturer. A 6.8 H inductor has been experimentally found as the most suitable for applications running at a 660 kHz switching frequency.
B.2
Capacitors selection
The input and output capacitors should have very low ESR (ceramic capacitors) in order to minimize the ripple voltage. The boost converter of the PM6600 has been designed to support ceramic capacitors. The required capacitance depends on the programmed LED current and the minimum dimming frequency (the boost converter is off when the DIM pin is low and the output capacitor is slowly discharged). Considering the worst case (i.e. 200 Hz dimming frequency and 30mA/channel), two 2.2 F MLCCs are suitable for almost all applications. Particular care must be taken when selecting the rated voltage and the dielectric type of the output capacitors: 50 V rated MLCC may show a significant capacitance drop when biased, especially in case of Y5V dielectric. As in most of boost converters, the input capacitor is less critical, although it is necessary to reduce the switching noise on the supply rail. The input capacitor is also important for the internal LDO of the PM6600 and must be kept as close as possible to the chip. The rated voltage of the input capacitor can be chosen according to the supply voltage range; a 10 F X5R MLCC is recommended.
B.3
Flywheel diode selection
The flywheel diode must be a Schottky type to minimize the losses. This component is subject to an average current equal to the output one and must sustain a reverse voltage equal to the maximum output rail voltage. Considering all the channels sinking 30 mA each (i.e. 180 mA output current) and the maximum output voltage (36 V), the STPS1L40M (If,ave = 1 A, Vr = 40 V) diode is a good choice. Smaller diodes can be used in applications involving lower output voltage and/or lower output current.
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PM6600
Application note
B.4
Design example
In order to help the design of an application using the PM6600, in this section a simple stepby-step design example is provided. A typical application could be the LCD backlight in a 14.1" LCD panel using the PM6600. Here below the possible application conditions are listed:
VIN = 12 20 % 6 ROWs x 8 WLEDs @ 20 mA VF, LEDs = 3.5 V 200 mV
B.4.1
Switching frequency setting
To reduce the number of the external components, the default switching frequency is selected (660 kHz typ.) by connecting the FSW pin to AVCC pin. However, in case a different switching frequency is required, a resistor from FSW pin and ground can be connected, according to the equation
Equation 22
RFSW =
FSW 2 .5
B.4.2
Row current setting
The ROWs current is set using a resistor connected to the RILIM pin of the device. The RRILIM resistor can be calculated as:
Equation 23
RRILIM =
KR IROW
=
998 V = 49.9k 20 mA
B.4.3
Inductor choice
The boost section, as all DC-DC converters, can work in CCM (continuous conduction mode) or in DCM (discontinuous conduction mode) depending on load current, input and output voltage and other parameters, among which the inductor value. In a boost converter it is usually preferable to work in DCM. Once the load, the input and output voltage, and the switching frequency are fixed, the inductor value defining the boundary between DCM and CCM operation can be calculated as:
Equation 24
LB =
where D is the duty-cycle defined as:
R 0 D (1 - D) 2 FSW
2
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Application note Equation 25
PM6600
D = 1-
0.68 @ VIN,min = 9.6V VIN = VOUT 0.52 @ VIN,max = 14.4V
whereas R0 is:
Equation 26
R0 = and
Equation 27
VOUT = 250 IOUT
IOUT = 6 IROW = 120mA The output voltage in the above calculations is considered as the maximum value (LED with the maximum forward voltage connected to the leading generator):
Equation 28
VOUT,max = 8 VF,LEDs,max + 400mV = 30V
Figure 57. Inductor current in DCM operation
IL
IL, p eak
TO N
T OF F TS W = 1/FSW
t
Considering the input voltage range, the lower LB will be at the lower input voltage. Hence the condition to assure the DCM operation becomes:
Equation 29
L < L B (VIN,min ) = 13.2H An inductor value of 6.8 H could be a suitable value, considering also a margin from the boundary condition.
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PM6600
Application note
It is important to highlight that the inductor choice involves not only the value itself but the saturation current (higher than the boost current limit), the rated RMS current (the compliance with the saturation current might be not enough; also the thermal performances must be taken into account), the DCR (which affects the efficiency) and the size (in some application might be a strict requirement). However the DCR can't be reduced keeping the size small. Hence a trade off between these two requirements must be achieved according to the application.
B.4.4
Output capacitor choice
The choice of the output capacitor is mainly affected by the desired output voltage ripple. Since the voltage across the LEDs can be considered almost constant, this ripple is transferred across the current generators, affecting their dynamic response. The output ripple can be estimated as (neglecting the contribution of ESR of COUT, very low in case of MLCC):
Equation 30
VOUT =
(IL,peak - IOUT ) TOFF
2 C OUT
where IL, peak is the inductor peak current (see Figure 1) calculated as:
Equation 31
IL,peak =
VIN D 1.044 A @ VIN,min = 9.6V = Fsw L 0.914 A @ VIN,max = 14.4V
whereas D, working in DCM, is:
Equation 32
D=
2 Fsw L M(M - 1) 0.488 @ VIN,min = 9.6V = R0 0.285 @ VIN,max = 14.4V
defining M as:
Equation 33
M=
VOUT VIN
3.125 @ VIN,min = 9.6V 2.083 @ VIN,max = 14.4V
TOFF can be calculated as:
Equation 34
348.5ns @ VIN,min = 9.6V TOFF = TSW D 2 = 398.5ns @ VIN,max = 14.4V
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Application note
PM6600
defining D2 as: 2 FSW L M 0.23 @ VIN,min = 9.6V = R 0 (M - 1) 0.263 @ VIN,max = 14.4V
D2 =
The worst case for the output voltage ripple is when input voltage is lower (VIN,min = 9.6 V). A simple way to select the COUT value is fixing a maximum voltage ripple. In order to affect as less as possible the current generators, it would be better to fix the maximum ripple lower than the typical voltage across the generators. For example considering VOUT lower than 80 mV (i.e. the 20 % of the voltage across the leading generator), the required capacitance is:
Equation 35
COUT >
(IL,peak - IOUT ) TOFF
2 VOUT,max
= 2.02F
A margin from the calculated value should be taken into account because of the capacitance drop due to the applied voltage when MLCCs are used. A 4.7 F MLCC can be a good choice for this application (two 2.2 F MLCC in parallel can be also a good solution). In case a dimming duty cycle different from 100 % is used, a further contribution to the capacitor discharge (during the off time of the dimming cycle) should be considered.
B.4.5
Input capacitor choice
The input capacitor of a boost converter is less critical than the output capacitor, due to the fact that the inductor is in series with the input, and hence, the input current waveform is continuous. A low ESR capacitor is always recommended. A capacitor of 10 F is tentatively a good choice for most of the applications.
B.4.6
Over-voltage protection divider setting
The over-voltage protection (OVP) divider provides a partition of the output voltage to the OVSEL pin. The OVP divider setting not only fixes the OVP threshold, but also the openchannel detection threshold (93 % of the OVP threshold). The proper OVP divider setting can be calculated by the equation:
Equation 36
V R1 = R 2 OVP - 1 1.235
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PM6600
Application note
VOVP has to be choosen in the range
Equation 37
VOUT max + 3V < VOVP < VOUT max + 4.5V Where
Equation 38
VOUT max = n WLED _ series VF _ WLED max + 400mV = 30V R1 can be chosen is in the order of hundreds of kilo-ohms to reduce the leakage current in the resistor divider. For example, setting R2 = 15 k leads to R1 = 390 k (VOVP = 33.5 V). The OVSEL divider capacitors should be chosen according to the formula
Equation 39
C13 = 1.5 C10
R2 R1
For most cases, C10 = 220 pF and C13 = 22 pF are recommended.
B.4.7
Compensation network
For the compensation network, the suggestions provided in section 7.4 are always valid. The following value of R3 and C8 are usually a good choice for the loop stability:
R3 = 2.4 k C8 = 4.7 nF These values are correct when working with 6 ROWs. For applications using less then 4 ROWs it is recommended to calculate again the value of the compensation components. Please refer to the Table 11 on page 54 for a detailed components check
B.4.8
Boost current limit
The boost current limit is set to protect the internal power switch against excessive current. The slope compensation may reduce the programmed current limit. Hence, to take into account this effect, as a rule of thumb, the current limit can be set as twice as much the maximum inductor peak current (see section 1.2.4): IBOOST, PEAK > 2.09 A Therefore choosing IBOOST, PEAK = 2.5 A, RBILIM will be:
Equation 40
RBILIM =
KB IBOOST,PEAK
= 240k
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Application note
PM6600
B.4.9
Soft-start
The SS duration is set connecting a capacitor between the SS pin and GND. The capacitor is thus charged with a constant 5 A current, forcing the SS pin voltage to ramp up. The current limit of the internal power-MOS is proportionally released. It reached the set value when the voltage on the SS pin is 1.2 V. During the initial part of the SS, the switching frequency is reduced to half of the set value. This is done to avoid current runaway due to the minimum on time of the switching controller. The switching frequency becomes the set one when the SS pin voltage is 0.8 V. Since the current limit is been released proportionally, the changing of the switching frequency causes the output to increase with an higher slew-rate. In order to avoid the output overshoot and to avoid a too high slew rate in the OVSEL pin voltage ramp, it is necessary to set up correctly the SS capacitors, taking into account all the working conditions (mainly VIN, IOUT, COUT, ILIM) During the SS it is performed the floating ROWs detection. When one or more ROWs are open, the output voltage increases until the OVSEL pin reaches the FRD threshold (93 % of the OVP threshold). At this point the floating ROWs are internally excluded from the control loop and considered not connected. When the SS pin reaches 2.4 V all the IC protections turn active. The latched OVP protection is activate as soon as the internal LDO regulates 5 V. In order to properly dimension the CSS value, it should be considered the two cases: 6 ROWs application and less than 6 ROWs application. When working with 6 ROWs, the CSS value should be chosen in the range 3.3 nF to 10 nF. Since the DIM signal is internally forced to 100% during the soft-start, a bigger CSS results in a bigger WLEDs brightness that can be higher than the resultant one after the soft-start, when the ROWs current generators are driven with the applied external DIM signal. When working with less than 6 ROWs, the application components should be chosen in order to avoid an OVP triggering due to the switching frequency change mechanism when SS = 0.8 V. The suggested minimum value for CSS is, in this case, 6.8 nF. Moreover, the other critical components to change respect to the standard 6 ROWs application are
Table 11. Components
6 ROWs application 3.3 nF 250 k 680 k 2.4 k 4.7 nF < 6 ROWs application 6.8 nF 200 k 1 M 3.3 k 3.3 nF
Component name CSS RBILIM RSLOPE RCOMP CCOMP
CSS, RBILIM and RSLOPE components are changed to shift the time in which the frequency increases at the set value. The shift guarantees to avoid any VOUT overshoot with VIN > 10 V. RCOMP and CCOMP are changed to lower the amplitude of the overshoot for 7.5 V54/58
PM6600
Application suggestions
Appendix C
C.1
Application suggestions
EN, DIM path in production line
Normally, in production line, the LCD modules are connected to testing machines with long wires. The VIN, EN and DIM signals are provided with automatic testing equipment, such as relays and/or software controlled switches, that connects the dedicated power supplies to the board. The wires parasitic inductance can lead to voltage spikes conditions that can exceed the device maximum absolute ratings, thus resulting in a device damage. In order to filter the critical signals, the suggestion is to add an RC network between the board connector and the device pin. In case of the EN pin, the recommended power supply value is 3.3 V, and we also suggest to use an RC low pass filter network with R = 470 to 1 k, C = 470 pF to 1 nF. In case of the DIM pin, we suggest to use a function generator. In case of using a power supply, it is preferable to use 3.3 V and the same RC filter as the EN pin. For what concerns the VIN pin, it is already filtered by the input capacitors.
C.2
Debug and measurements test points
The tests points used to check the functionality of the board during PCB assembly and/or in the production line can be dangerous in case of not-protected ESD environment or in case overvoltage or overcurrent, exceeding the absolute maximum ratings (AMR) of the device, hits them. The critical pins involved are the ROWx pins. In case a testing machine is connected with needles on the ROWx pins test points, it can be possible that an ESD, exceeding AMR, occurs or it is possible that the testing machine creates and overvoltage/overcharge condition in the pin. In this case the device will result damaged. The corrective action is to add, for every ROWx pin, 100 pF capacitor vs GND and to avoid the test points on the ROWx pins if not strictly necessary.
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Application suggestions
PM6600
C.3
Inductor choice
The inductor selection should be done according to the datasheet guidelines. The choice of the inductor value is explained in the Section B.4.3: Inductor choice on page 49. Moreover, the inductor has to be properly dimensioned also according to the boost current limit, Section B.4.8: Boost current limit on page 53 When using low current rated inductors, the risk is to have the inductor saturating during the soft-start sequence or even during operating mode. In case of saturation during the soft-start, the device can go into OVP and latch off. If the inductor is hard saturating, both in soft-start and in operating mode, the risk is to have the LX pin exceed the absolute maximum ratings. In this condition, the device will switch using the minimum on time of the boost controller, to avoid the output overcharge and to preserve the leds from issues. If the saturation is prolonged, the inductor is behaving as a wire (the inductance value will be extremely reduced). This will create inductor damage and/or device damage because of overstress condition.
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PM6600
Revision history
11
Revision history
Table 12.
Date 07-Dec-2007 21-Jan-2008 07-Apr-2008 20-Oct-2008
Document revision history
Revision 1 2 3 4 Initial release Updated Table 4, Table 5 and Table 6 on page 12 Updated Section 3.3 on page 11 and Section 8.2 on page 38 Updated Section 3.3 on page 11 and Section 8.2 on page 38 Added Section Appendix A on page 44, Section Appendix C on page 55 Changes
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PM6600
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