STS11NF30L
N-channel 30V - 0.0085 - 11A SO-8 Low gate charge STripFETTM II Power MOSFET
General features
Type STS11NF30L
VDSS 30V
RDS(on) <0.009
ID 11A
Optimal RDS(on) x Qg trade-off Conduction losses reduced
S0-8
Description
This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
Internal schematic diagram
Applications
Switching application
Order codes
Part number STS11NF30L Marking 11F30LPackage SO-8 Packaging Tape & reel
January 2007
Rev 11
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Contents
STS11N F30L
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . .. . .. . .. . .. . .... 6
3 4 5
Test circuit
. . .. . .. . .. . .. . .. . .. . .. . .. . .... 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STS11NF30L
Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID
(1)
Absolute maximum ratings
Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 30 18 11 7 44 2.5 0.02 5.5 -55 to 150 150 Unit V V A A A W W/C V/ns C
ID IDM(2) PTOT dv/dt(3) TJ Tstg
Peak diode recovery voltage slope Operating junction temperature Storage temperature
1. Current limited by the package 2. Pulse width limited by safe operating area 3. ISD 1A, di/dt 370A/s, VDD V(BR)DSS, Tj TJMAX 1
Table 2.
Rthj-a Tl
Thermal data
Thermal resistance junction-ambient Max(1) Maximum lead temperature for soldering purpose 50 150 C/W C
1. When Mounted on 1 inch2 FR-4 board, 2 oz of Cu and t [ 10 sec
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Electrical characteristics
STS11NF30L
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 3.
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250 A, VGS = 0 VDS = Max rating VDS=Max rating, TC=125C VGS = 18V VDS = VGS, ID = 250A VGS = 10V, ID = 5.5A VGS = 5V, ID = 5.5A 1 0.0085 0.0105 0.0145 0.0190 Min. 30 1 10 100 Typ. Max. Unit V A A nA V
IDSS
IGSS VGS(th) RDS(on)
Table 4.
Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge VDD = 15V, ID = 11A, VGS =5V VDS = 25V, f = 1 MHz, VGS = 0 Test conditions VDS = 25V, ID=5.5A Min. Typ. 15 1440 560 135 22.5 9 12 30 Max. Unit S pF pF pF nC nC nC
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 .
Table 5.
Symbol td(on) tr td(off) tf
Switching times
Parameter Turn-on delay time Rise time Test conditions VDD=15 V, ID=5.5A, RG=4.7, VGS= 5V (see Figure 13) VDD = 15V, ID = 5.5A, RG = 4.7, VGS = 5V (see Figure 13) Min. Typ. 22 39 Max. Unit ns ns
Turn-off-delay time Fall time
23 16
ns ns
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STS11NF30L Table 6.
Symbol ISD ISDM VSD
(1) (2)
Electrical characteristics Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 11A, VGS = 0 ISD = 11A, VDD = 20V di/dt = 100A/s, Tj = 150C (see Figure 15) 42 52 2.5 Test conditions Min Typ. Max 11 44 1.2 Unit A A V ns nC A
t rr Qrr IRRM
1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %
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Electrical characteristics
STS11NF30L
2.1
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
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STS11NF30L Figure 7. Gate charge vs gate-source voltage Figure 8.
Electrical characteristics Capacitance variations
Figure 9.
Normalized gate threshold voltage vs temperature
Figure 10. Normalized on resistance vs temperature
Figure 11. Source-drain diode forward characteristics
Figure 12. Normalized Breakdown Voltage vs Temperature
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Test circuit
STS11N F30L
3
Test circuit
Figure 14. Gate charge test circuit
Figure 13. Switching times test circuit for resistive load
Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test switching and diode recovery times circuit
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
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STS11NF30L
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at : www.st.com
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Package mechanical data
STS11NF30L
SO-8 MECHANICAL DATA
DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm. MIN. TYP M AX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. M AX . 0.068 0.009 0.064 0.033 0.018 0.010 0.019
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STS11NF30L
Revision history
5
Revision history
Table 7.
Date 09-Sep-2004 17-Aug-2006 12-Jan-2007
Revision history
Revision 9 10 11 Complete version The document has been reformatted Updates in Safe operating area Changes
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STS11NF30L
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