UM0157 User Manual
Getting Started with the SPEArNet Evaluation Board
Introduction
The SPEAr Net Evaluation Board lets you evaluate STMicroelectronics' SPEAR-07-NC03, a smart Communication Controller for Universal Serial Bus (USB) and Ethernet communications. (Starter kit order code: STEVAL-SPEAR-NET) The SPEAR-07-NC03 enables the sharing of Full speed USB host, IEEE1284 or Universal Asynchronous Receiver Transmitter (UART) peripherals within an Ethernet system. This document explains how to easily get started developing applications for an Ethernet system that uses various communication interfaces. The 12V AC/DC board supply voltage provides 1.8V, 3.3V and 5.0V output voltage ranges. 14- and 20-pin JTAG connectors makes developing your applications easier. For information about the SPEAr Net operating system, software drivers and application development, please refer to UM0195: Getting Started with the SPEAr Net Evaluation Software. Figure 1. SPEAr Net Evaluation Board Image
February 2006
Rev 1
1/22
www.st.com
Contents
UM0157 - Getting Started with the SpearNet Evaluation Board
Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 Main features of the SPEAr Net Evaluation Board . . . . . . . . . . . . . . . . . . . 3 Main features of the SPEAr Net device . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 DIP switch settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Indicator LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.9.1 1.9.2 1.9.3 1.9.4 1.9.5 1.9.6 1.9.7 RS-232 connection (P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Full speed USB host connection (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . 10 RJ-45 Ethernet connection (U16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 EMI connector (J14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 IEEE1284 & External processor interface connector (J8) . . . . . . . . . . . 11 GPIO/I²C connector (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 MII Ethernet connector (J9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.10
Ethernet physical layer address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1 2.2 Application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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UM0157 - Getting Started with the SpearNet Evaluation Board
General description
1
General description
The SPEAr Net Evaluation Board helps you develop applications that require the sharing of Full speed USB host controller, IEEE1284 or Universal Asynchronous Receiver Transmitter (UART) peripherals within an Ethernet system. Figure 2. SPEAr Net Evaluation Board DIagram
SDRAM JTAG
EMI
Flash Memor y
GPIO
Power Supply
1.8V, 3.3V and 5.0V
SPEAr Net ARM720T Processor
Ethernet PHY
IEEE 1284
RS-232
MII
I²C
Full Speed USB Host Controller
Ai11688
1.1
Main features of the SPEAr Net Evaluation Board
Memory: 16MByte SDRAM and 8MByte Flash Connectivity bridge between: IEEE802.3/Ethernet MAC core Full speed USB Host Controller IEEE1284 multi-function parallel port Ethernet STE101P (100P) RS-232 interface I²C interface 6 General purpose I/O ports External Memory Interface (EMI) Media Independent Interface (MII) External Processor Interface JTAG: 14- and 20-pin connectors Power supply 12V AC/DC board supply voltage 1.8V, 3.3V and 5.0V output voltage ranges
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General description
UM0157 - Getting Started with the SpearNet Evaluation Board
1.2
Main features of the SPEAr Net device
Based on 32-bit ARM720T RISC microprocessor with 8KByte cache and Memory Management Unit (MMU) Full speed USB Host Controller 10/100 Mbits/s Ethernet connection 115 Kbytes/s UART Interface IEEE 1284 Host Controller I²C master interface supporting Fast I²C mode (400 kHz) Real Time Clock Up to 6 general purpose I/Os 8KByte SRAM shared with an External Microprocessor Static Memory Controller (up to 2 banks of max. 16 MBytes each) DRAM Controller SDRAM/EDO (up to 4 banks of max. 32 MBytes each) Two 16 KByte External I/O banks Interrupt controller with 9 internal and 2 external interrupt sources SPEAr Net evaluation board layout
Figure 3.
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UM0157 - Getting Started with the SpearNet Evaluation Board
General description
1.3
Table 1.
Memory Flash SDRAM SRAM
Memory mapping
Memory map description
Memory map available 0x0000.0000 - 0x01FF.FFFF 0x1000.0000 - 0x17FF.FFFF 0x2100.0000 - 0x2100.1FFF Memory map used 0x0000.0000 - 0x007F.FFFF 0x1000.0000 - 0x10FF.FFFF 0x2100.0000 - 0x2100.1FFF Description Flash M29W640ET SDRAM MT48LC8M16 8 KB Shared SRAM
1.4
Power supply pins
The J6 connector should provide 5V - 35V DC to power the board. There are three on-board voltage regulators providing 1.8V, 3.3V and 5.0V power supplies for the on-board components. All the voltages are also available on separated connectors and therefore can be used to power-up external boards. When one of these voltage supplies is enabled, the corresponding LED lights up. Figure 4. Power supply pins
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General description
UM0157 - Getting Started with the SpearNet Evaluation Board
1.5
Test points
The SPEAr Net Evaluation Board includes test points for monitoring various activities. Figure 5. Ethernet test points and Ground connections
Table 2.
Ethernet test point descriptions
Description Reset in Progress Transmit Error Manager Data Interrupt
Test Point RIP TX_ERR MDINT
1.6
DIP switch settings
Table 3 lists the DIP switch settings that configure the microcontroller boot-up settings. Table 3.
Pin 8 SW1: Microcontroller Boot-up settings Default Off Description Add22_SDRAM1EDO0 On: DMC configured for SDRAM Off: DMC configured for EDO DRAM Add21_USB_CLK_Enable On: USB clock enabled Off: USB clock disabled (power-saving mode)
7
Off
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Rev 1
UM0157 - Getting Started with the SpearNet Evaluation Board Table 3.
Pin 6 SW1: Microcontroller Boot-up settings Default Off Description Add20_IEEE1XP0 On: IEEE 1284 Parallel port enabled Off: IEEE 1284 Parallel port disabled Add19_ ROM_BSIZE On: 16-bit ROM Off: 8-bit ROM Add18_UART1JTAG0 On: JTAG disabled Off: JTAG enabled Add17_PLL_Bypass On: PLL bypassed Off: PLL output enabled Add16_HWCFG1 - Reserved Add15_HWCFG0 - Reserved
General description
5
Off
4
On
3 2 1
On -- --
Table 4 lists the DIP switch settings that configure the initial state of the STE101P at powerup. Table 4.
Pin SW2: Ethernet settings Default Device in Power down mode On: Disabled Off: Enabled Power-down On: Disabled Off: Enabled MLT3 Encoder/Decoder Enable (CFG0) On: MLT3 enabled Off: MLT3 disabled Loop-back Disable (CFG1) On: Loop-back disabled Off: Loop-back enabled Duplex mode (FDE) On: Half Duplex mode Off: Full duplex mode Auto-negotiation Disable (MFO) On: Auto-negotiation disabled Off: Auto-negotiation enabled Enable NRZ/NRZI Conversion (MF1) On: NRZI enabled Off: NRZI disabled Enable 4B/5B Coding (MF2) On: 4B/5B enabled Off: 4B/5B disabled Description
10
On
9
On
8
On
7
On
6
Off
5
Off
4
Off
3
Off
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General description Table 4.
Pin
UM0157 - Getting Started with the SpearNet Evaluation Board
SW2: Ethernet settings Default Enable Scrambler (MF3) On: Scrambler enabled Off: Scrambler disabled 10/100 Mbps Speed Select (MF4) On: 10Base-T operation Off: 100Base-T operation Description
2
On
1
Off
Table 3 lists the DIP switch settings that configure the microcontroller boot-up settings. Table 5.
Jumper STE100P/101P Others Default Shor ted Description If shorted, the STE101P can be used on the board with another component.
1.7
Buttons
Table 6. Setting
Button Reset Description Press this button to reset the evaluation board.
1.8
Indicator LEDs
When the following conditions are detected on the SPEAr Net Evaluation Board, the corresponding LED lights up. Table 7. LED descriptions
LED D6/17 D7/18 D8/19 D9/20 D10/21 D0 D1 D2 D3 D4 D5 Conditions 100 Mbps operation speed is detected. Full duplex communication. When 100Mbps or 10Mbps link is active and when Transmit and Receive activity is detected. TX/RX activity is detected. 10 Mbps operation speed is detected. GPIO0 port is enabled. GPIO1 port is enabled. GPIO2 port is enabled. GPIO3 port is enabled. GPIO4por t is enabled. GPIO5 port is enabled.
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UM0157 - Getting Started with the SpearNet Evaluation Board Table 7. LED descriptions (continued)
LED D14 D15 D16 Conditions 1.8V Power Supply is detected. 3.3V Power Supply is detected. 5V Power Supply is detected.
General description
1.9
Connectors
The SPEAr Net Evaluation Board includes the following communication connections. Table 8.
Name J3 J2 U16 J5 J6 J4 J9 Standard 20-pin JTAG connector 14-pin Lauterbach debug tool connector RJ-45 Ethernet connector Full speed USB Host Controller connector 5 to 35 Volt supply input GPIO 0 to 6 = Pins 2 to 7 (Pin 1 = 3.3V and Pin 8 = GND) MII Ethernet connector (See Table 15)
Connector descriptions
Description
J12, 7, 10, 11, 13 Ethernet Physical Layer (PHY) address setting J14 J8 P2 External Memory Interface (EMI) connector IEEE 1284 connector RS-232 (UART) connector
1.9.1
RS-232 connection (P2)
The ST3232B Transceiver ensures RS-232 communication via the UART serial channel of the SPEAr Net microcontroller. The maximum speed of this interface is 115 Kbits/s. Figure 6. RS-232 connector
Table 9.
RS-232 pinout
Description RxD (Receive Data) TxD (Transmit Data)
Pin No. 2 3
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General description Table 9.
UM0157 - Getting Started with the SpearNet Evaluation Board RS-232 pinout (continued)
Description GND
Pin No. 5
1, 4, 6, 7, 8 and 9 Not connected
1.9.2
Full speed USB host connection (J5)
The A-series male USB connector ensures Full speed (12 Mbits/s) USB communications. Figure 7. A-series male USB connector
Table 10.
USB pinout
Description +5V Data+ DataGND
Pin No. 1 2 3 4, 5 and 6
1.9.3
RJ-45 Ethernet connection (U16)
The integrated Ethernet MAC and STE101P external physical layer chip ensure connections to Ethernet networks via twisted pair full-duplex cables (crossed or direct). Figure 8. RJ-45 connector
Table 11.
RJ-45 pinout
Description TX+ (Transmit Data) TX- (Transmit Data) RX+ (Receive Data) RX- (Receive Data) Not connected GND
Pin No. 1 2 3 6 7 4, 5 and 8
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UM0157 - Getting Started with the SpearNet Evaluation Board
General description
1.9.4
EMI connector (J14)
The External Memory Interface (EMI) provides access to static and dynamic memories and external I/O addresses via a 58-pin connector. Table 12.
Pin 0 1 2 3 4 5 6 7 8 9 10 11 13 14 15
RJ-45 pinout
Signal Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Signal Addr15 Addr16 Addr17 Addr18 Addr19 Addr20 Addr21 Addr22 Data0 Data1 Data2 Data3 Data4 Data5 Data6 Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Signal Data7 Data8 Data9 Data10 Data11 Data12 Data13 Data14 Data15 nSDCS nRAS1 nRAS2 nRAS3 nRAS nCAS Pin 46 47 48 49 50 51 52 53 54 55 56 57 58 Signal LDQM UDQM nWE nOE CLK CKE nRCS0 nRCS1 nECS0 nECS1 +3.3V GND
Addr0 Addr1 Addr2 Addr3 Addr4 Addr5 Addr6 Addr7 Addr8 Addr9 Addr10 Addr11 Addr12 Addr13 Addr14
1.9.5
IEEE1284 & External processor interface connector (J8)
An external processor interface provides IEEE1284-based access to the internal static shared RAM of the microcontroller; enabling the sharing of data between independent processors. Table 13.
Pin 1 2 3 4 5 6 7 8 9
IEEE 1284 pinout
Signal Pin 17 18 19 20 21 22 23 24 25 Signal XPAddr1/nSTROBE XPAddr2 XPAddr3 XPAddr4 XPAddr5 XPAddr6 XPAddr7 XPAddr8 XPAddr9 Pin 32 33 34 35 36 37 38 39 40 nXPRE nXPwait nXPIRQ nXIRQ0 nXIRQ1 nXDRQ0 nXDRQ1 nXDACK0 nXDACK1 Signal
XPData0/PpData0 XPData1/PpData1 XPData2/PpData2 XPData3/PpData3 XPData4/PpData4 XPData5/PpData5 XPData6/PpData6 XPData7/PpData7 XPData8
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General description Table 13.
Pin 10 11 13 14 15 16 XPData9 XPData10 XPData11 XPData12 XPData13 XPData14
UM0157 - Getting Started with the SpearNet Evaluation Board IEEE 1284 pinout (continued)
Signal Pin 26 27 28 29 30 31 XPAddr10 XPAddr11 XPAddr12 XPAddr13 nXPCS nXPWE Signal Pin 41 42 43 44 Signal Resetout 3.3V GND GND
1.9.6
GPIO/I²C connector (J4)
This 8-pin connector enables connections of general purpose I/Os and I²C interface pins. Table 14.
Pin No. 1 2 3 4 5 6 7 8 +3.3V GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GND I2C SCL I2C SDA -
GPIO and I²C pinout
Signal Peripheral
1.9.7
MII Ethernet connector (J9)
Table 15. J9 MII Ethernet connector pin description
Pin 1 2 3 4 5 6 7 8 9 10 Description GND +5V MDC MDI/O RXD2 RXD3 RXD0 RXD1 RX_CLK RX_DV Pin 11 12 13 14 15 16 17 18 19 20 Description -- RX_ERR TX_EN TX_CLK TXD1 TXD0 TXD3 TXD2 CRS COL
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UM0157 - Getting Started with the SpearNet Evaluation Board
General description
1.10
Ethernet physical layer address
The STE101P is a high performance Fast Ethernet physical layer interface for 10Base-T and 100Base- TX applications. It was designed with advanced CMOS technology to provide MII, RMII and SMII interfaces for easy attachment to 10/100 Media Access Controllers (MAC) and a physical media interface for 100Base-TX of IEEE802.3u and 10Base-T of IEEE802.3. The STE101P supports both half-duplex and full-duplex operation at 10 and 100 Mbit/s operation. Its operating mode can be set using auto-negotiation, parallel detection or manual control. It also supports the auto-negotiation functions for speed and duplex detection. Figure 9 shows how to set the MII address of the STE101P physical layer (ADDR[4:0]) using five jumpers near each of the Ethernet LEDs. Connecting the second and the third jumpers sets (for example, ADDR[4]) a logic `0'; connecting the first and the second jumpers sets (for example, ADDR[2]) a logic `1'. In this example, the MII Ethernet PHY address is set to `4' (`100' in binary). Figure 9. Setting the Ethernet physical layer address
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2
2.1
C OM P
I NH
GN D
VR EF
4
3
7
6
GND
C 78 100n C 77 100n LD 1117D T33 C TS 10M/6.3V (B) 1 C 66 + C 67 + C TS 10M/6.3V (B)
LD 1117D T18
V
CC
R 68 10k
RESET
Small Jumper
s h_rs t V CC R 67 10k V CC
4 Power Good
1
U 15 8 V CC 7 2 3 C 27 C 31 100nF 100nF 1 2
5 R ESI N CT
R ESET SEN SE
TL7700A
1 GND
R EF
Reset
Section 2.1: Application diagrams show the connections required for a typical application. Section 2.2: Bill of materials lists the required components.
UM0157 - Getting Started with the SpearNet Evaluation Board
Ai11691
C 32 100nF
4
GN D
14/22
V L5970AD 8
V IN OUT V
J6 U 10 1 FB D 13 5 33H R 38 12k + C 26 100F 16V 5V 2 SY N C C 23 10F 35V
D 11
L4
CC
1
24V
3 2
STTH 1L06A
Typical application
TAP_2. 5mm
STPS340U
D 12 STTH 1L06A C 24 22nF C 25 220pF GN D R 40 4k 7
R 39 3k 9
Figure 10. Power Supply connections
V DD CC DD3 V U 12
CC
U 11
V V
L D 1 1 1 7DT1 8
V OUT IN OUT V V
L D 11 1 7 DT 3 3
4 3 4
Application diagrams
Typical application
3
V
IN
Rev 1
Typical application
U 2A J 14 Add0 Add1 Add2 Add3 Add4 Add5 Add6 Add7 Add8 Add9 Add10/ AP Add11 Add12 Add13 Add14 Add15 Add16 Add17 Add18 Add19 Add20 Add21 Add22 U8 Addr0 H 7 Addr1 H 8 Addr2 J 8 Addr3 J 7 Addr4 J 3 Addr5 J 2 Addr6 H 3 Addr7 H 2 Addr8 H 1 Addr9 G3 Addr10H 9 Addr11G2 G1 K 4S 5 6 0 43 2 - 4M x 1 6B i t K 4S 2 8 1 63 2 - 2M x 1 6B i t K 4S 6 4 0 43 2 - 1M x 1 6B i t A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 /AP 0 A11 A12 C AS R AS CS WE C LK C KE LD QM U D QM D Q8 D Q9 D Q10 D Q11 D Q12 D Q13 D Q14 D Q15 NC/ RF U BA1 BA0 GN D GN D GN D GN D GN D GN D GN D E1 D at a8 D 2 D at a9 D 1D at a10 C 2 D at a11 C 1D at a12 B2D at a13 B1D at a14 A2D at a15 E2 G8Addr13 G7 Addr12 D Q0 D Q1 D Q2 D Q3 D Q4 D Q5 D Q6 D Q7 A8 B9 B8 C9 C8 D9 D8 E9 nC AS F 7 nR AS F 8 nSD C S 9 G nW E F 9 C LK F 2 C KE F 3 LD QM E8 U D QM F 1 V DD 3 V DD 3 V x 4 Banks SDRAMVD D 3 x 4 Banks SDRAMVD D 3 x 4 Banks SDRAMVD D 3 DD 3 V DD 3 D at a0 D at a1 D at a2 D at a3 D at a4 D at a5 D at a6 D at a7 A7 A9 B3 C7 D3 E7 J9 D at a0 D at a1 D at a2 D at a3 D at a4 D at a5 D at a6 D at a7 D at a8 D at a9 D at a10 D at a11 D at a12 D at a13 D at a14 D at a15 nR AS0/ nSD C S0 nR AS1/ nSD C S1 nR AS2/ nSD C S2 nR AS3/ nSD C S3 nSD R AS nSD C AS nC AS0/ D QM0 nC AS1/ D QM1 nW E nOE SD C L K C LKE nR C S0 nR C S1 nEC S0 nEC S1 SpearN et L10 P1 2 N 11 P1 4 P2 N 10 P1 1 N 12 N 13 M12 LD QM U D QM nW E nOE C LK C KE nR C S0 nR C S1 nEC S0 nEC S1 V N9 M10 nR AS nC AS N8 M9 K9 P9 nSD C S nR AS1 nR AS2 nR AS3 nSD C S nR AS1 nR AS2 nR AS3 nR AS nC AS LD QM U D QM nW E nOE C LK C KE nR C S0 nR C S1 nEC S0 nEC S1 DD 3 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 EMI P3 N4 P4 N5 P5 M6 N6 P6 L6 M7 N7 K7 L7 M8 K8 P8 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 D at a0 D at a1 D at a2 D at a3 D at a4 D at a5 D at a6 D at a7 D at a8 D at a9 D at a10 D at a11 D at a12 D at a13 D at a14 D at a15 D at a0 D at a1 D at a2 D at a3 D at a4 D at a5 D at a6 D at a7 D at a8 D at a9 D at a10 D at a11 D at a12 D at a13 D at a14 D at a15 F5 G4 G2 G1 G5 H4 H5 H1 H3 J4 J5 J2 J3 K5 K2 L1 K4 L2 M1 N1 M3 N2 P1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Addr0 Addr1 Addr2 dr2 Addr3 Addr4 Addr5 dr5 Addr6 Addr7 Addr8 Addr9 Addr10 Addr11 Addr12 Addr13 Addr14 Addr15 Addr16 Addr17 Addr18 Addr19 Addr20 Addr21 Addr22 Addr0 Addr1 Addr2 Addr3 Addr4 Addr5 Addr6 Addr7 Addr8 Addr9 Addr10 Addr11 Addr12 Addr13 Addr14 Addr15 Addr16 Addr17 Addr18 Addr19 Addr20 Addr21 Addr22 V DD3 Addr0 G2 Addr1 F 2 Addr2 E2 Addr3 C 2 Addr4 D 2 Addr5 F 3 Addr6 E3 Addr7 C 3 Addr8 D 6 Addr9 C 6 Addr10 E6 Addr11 F 6 Addr12D 7 Addr13C 7 Addr14 E7 Addr15 F 7 Addr16G7 Addr17D 3 Addr18 E4 Addr19 F 5 Addr20 F 4 Addr21 E5 nR C S0H 2 nOE J 2 nW E C 5 A1 A2 A7 A8 B1 B7 B8 A1 A3 B7 C3 D7 E3 J1 MT48LC 8M16 BGA54 U 13 M29 W 8 00 / 3 20 / 6 40 5 12 Kx 16 A0 Q0 A1 Q1 A2 Q2 A3 Q3 A4 Q4 A5 Q5 A6 Q6 A7 Q7 A8 Q8 A9 Q9 A10 Q10 A11 Q11 A12 Q12 A13 Q13 A14 Q14 A15 Q15A-1 A16 A17 A18 VPP/ W P V A19 DD 3 A20 GN D A21 GN D E G W NC NC NC NC NC NC NC RB RP BY TE NC NC NC NC NC NC NC NC V G3 K3 G4 K4 K5 G5 K6 G6 H3 J3 H4 J4 H5 J6 H6 J7 D4 J5 K7 K2 C4 D5 H7 L1 L2 L7 L8 M1 M2 M7 M8 R 84 4k 7 R 83 4k 7 D at a0 D at a1 D at a2 D at a3 D at a4 D at a5 D at a6 D at a7 D at a8 D at a9 D at a10 D at a11 D at a12 D at a13 D at a14 D at a15
D D3
C 40 . 1F
V D D3
UM0157 - Getting Started with the SpearNet Evaluation Board
SDRAM
M29W 640F T TFBGA48 V V DD 3 nR AS3 nR AS1 nR C S1 nEC S1 nR AS2 D D3 J2 1 3 5 7 9 11 13 V C ON 14A D D3 R 121 10K R 122 10K R 123 10K R 124 10K 2 4 6 8 10 12 14 R 119 R 129 R 125 R 128 R 127 R 130 R 132 R 126 22K 22K 22K 22K 22K 22K 22K 22K Addr15 Addr16 Addr17 Addr18 Addr19 Addr20 Addr21 Addr22 J3 1 3 5 7 9 11 13 15 17 19 C ON 20A 2 4 6 8 10 12 14 16 18 20 16 15 14 13 12 11 10 9
Figure 11. External Memory Interface
V D D3
C 41 . 1F
C 42 . 1F
C 43 . 1F
C 44 . 1F
NAME SW 1 SW DIP-8/SM
DESCRI PT IO N (STANDARD CONFIGURATION)
Add1 5_ HWCFG0
NOT USED
Add1 6_ HWCFG1 1 2 3 4 5 6 7 8
NOT USED
Add1 7_ PLL_ BYPASS
0 = PLL
Add1 8_ UART1J TAG0
0 = JTAG
Add1 9_ RO _BSIZ E M
1 = ROM size 16 Bi ts
Add2 0_ IE EE1XP0 R 113 R 115 R 117 R 120 R 114 R 116 R 118 R 104 2. 2K 2. 2K 2. 2K 2. 2K 2. 2K 2. 2K 2. 2K 2. 2K
1 = PARALLEL PO RT
Add2 1_ USB_CLK_EN
1 = USB CLocK ENabled
Add2 2_ SDRAM1EDO0
1 = SDRAM
Rev 1
FLASH
Ai11690
15/22
UM0157 - Getting Started with the SpearNet Evaluation Board
U 1A
V 55 56 57 58 TXD 0 TXD 1 TXD 2 TXD 3 TX_EN TX_C LK TX_ER R / TXD 4 GND e0 GND e1 GND e2 R XD 0 R XD 1 R XD 2 R XD 3 R X_D V R X_ER R / R XD 4 R X_CLK 59 60 CO L C RS V CC a 0 V CC a 1 V CC a 2 V CC a 3 V CC a 4 V c c e0 V c c e1 V c c e2 39 45 62 C1 .1 25 40 50 9 13 16 17 22 C5 .1 GN D a0 GN D a1 GN D a2 GN D a3 GN D a4 7 10 14 20 24 C6 .1 C7 .1 C8 .1 C9 .1 C 10 1 C2 .1 C3 .1 C4 1
DD3
L1 U 2B MD C MD I / O TX_C LK TXD 0 TXD 1 TXD 2 TXD 3 TX_EN CR S R X_C LK R XD 0 R XD 1 R XD 2 R XD 3 R X_D V R X_ER R C OL SpearN et
+5V MD I O M DC R XD [ 3] R XD [ 2] R XD [ 1] R XD [ 0] R X_D V R X_C LK R X_ER T X_ER T X_C LK T X_EN T XD [ 0] T XD [ 1] T XD [ 2] T XD [ 3] C OL CR S GN D
M13 N 14 K1 2 L14 K1 3 K1 4 J 12 K1 0 J 13 J 14 J 10 H 13 H 11 H 14 H 10 G11 M14 TP2 V
2 4 3 6 5 8 7 10 9 12 11 14 13 16 15 18 17 20 19 1
BLM41P800S
TXC LK 1
54 53 52
Connec t
47 46 44 43 48 51 49
to ground !!
TP1
L2
BLM41P800S
MD C a 1 MD C MD C a TXC LK
MD C b 42 41 61
MD C MD I O MD I N T
CC
MD C b STE100P/101P TC K
V
DD 3
L3 AVddT
U 1B
R1
R2 .1 21 TX P TXN RX P 23 19 R4 100 49. 9 49. 9
Figure 12. Ethernet Physical Layer Interface
C 12 Y1 15pF V DD 3 V DD3 R 25 10K 28 63 64 26 33 27 31 5 4 3 2 1 6
20 19 18 17 16 15 14 13 12 11 10K 6 R 10K 7 R 10K 8 R 10K 9 R 10K R 10 10K R 11 10K R 12 10K R 13 10K R 14 10K R 15
12 X1 25MHz 11
U 16 1 2 3 4 5 6 7 8
X2 nR ESET C F G1 C F G0 TEST TEST_SE PW R D W N CF 2 MF 0 MF 1 MF 2 MF 3 MF 4 F DE 15 I R EF STE100P R 16 10K
RX N
C 15 LED R 10 LED TR LED L LED C LED S RI P 38 37 36 35 34 V 29 LED 5 LED 4 LED 3 LED 2 LE LED 1 DD 3TP3 1
10K R 24
C 16 10pF 10pF
C 17 .1
C 28 .1 R5 49. 9
LED 1 LED 2 LED 3 LED 4 R 51 330 R 49 330 R 52 330 R 54 330 LED 5 R 56 330
C 14 .1
1k 8
1k 8
1k 8
1k 8
1k 8
Typical application
D 17
1
D 18
1
D 19
1
D 20
1
D 10 1
D6 1
D7 1
D8 1
D9 1
C1 8 D 21 MD I X 30 MD I X
1
.1
C 19 .1
R 58
R 50
R 53
R 55
SW 2 SW DIP-10
R 17
10K
GN D
V V V V V D D3 DD 3 D D3 DD 3 DD3 J 12 J7 J 10 J 11 J 13 1 addr0 1 addr1 1 addr2 1 add3 1 addr4 r 2 2 2 2 2 GN D GN D GN D GN D 3 3 3 3 3
1 2 3 4 5 6 7 8 9 10
R 57
10 13
R J 45
c has s is c has s is
18
RJ45
C 13
15pF
TX+ TXR X+ GN D GN D R XGN D GN D
c has s is c has s is
9 14
25MH z
R3 0
STE101P
BLM41P800S
C 11
16/22
Rev 1
J9 MI I TEST header
Ai11689
Typical application
V DD
V
DD
_C OR E
V D D3
V
_PLL DD3
C 46 . 1F . 1F . 1F . 1F . 1F . 1F . 1F . 1F . 1F . 1F . 1F . 1F
C 47
C 48
C 49
C 50
C 51
C 52
C 53
C 54
C 55
C 56
C 57
V
DD
_R TC
V
_I / O DD3
V DD U 2C J8 XPD a t a0/ Pp D at a0 XPD a t a1/ Pp D at a1 XPD a t a1/ Pp D at a2 XPD a t a1/ Pp D at a3 XPD a t a1/ Pp D at a4 XPD a t a1/ Pp D at a5 XPD a t a1/ Pp D at a6 XPD a t a1/ Pp D at a7 XPD at a8 XPD at a9 XPD a t a10 XPD a t a11 XPD a t a12 XPD a t a13 XPD a t a14 XPD a t a15 D 14 E1 1 D 13 B1 4 C 13 C 12 B1 3 B1 2 A1 3 B1 1 C 10 A1 1 B1 0 D 10 B9 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 V D D _1 V D D _2 V D D _3 V _I/O DD3 E6 A12 E12 G12 L 13 P10 L8 K6 M5 M2 K1 H2 F4 B2 V _ I / O_ 1 DD3 V _ I / O_ 2 DD3 V _ I / O_ 3 DD3 V _ I / O_ 4 DD3 V _ I / O_ 5 DD3 V _ I / O_ 6 DD3 V _ I / O_ 7 DD3 V _ I / O_ 8 DD3 V _ I / O_ 9 DD3 V _ I / O_ 10 DD3 V _ I / O_ 11 DD3 V _ I / O_ 12 DD3 V _ I / O_ 13 DD3 V _ PLL DD3 GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D U 2D F1 J 11 E9
_C OR E V D D3 J1 G3 E5 D2 C2 B5 A7 B8 A1 0 A1 4 F1 3 C 14 H 12 K1 1 P1 3 L9 P7 L5 N3 K3 C 58 .1 1 3 4 5 C 1+ C 1C 2+ C 216 U9
CC
V+ V V-
2 6 C 59 .1
V
DD3
C 60
C 45
UM0157 - Getting Started with the SpearNet Evaluation Board
.1
.1
SpearNet - Power and Miscellaneous Connections
SpearNet - External Processor and IEEE 1284 Interface
V
_PLL DD3
C 61 .1 12 9 11 10
R C 1ou t R C 2ou t TR 1I N TR 2I N MC LKI ST3232
R C 1IN R C 2IN TR 1o ut TR 2o ut GN D 15
13 8 14 7 5 9 4 8 3 7 2 6 1
Figure 13. Communication interfaces
R 47 33 0
R 48 33 0
R 59 33 0
R 60 33 0
R 61 33 0
nXPC S nXPW E nXPR E nXPW ait nXPI R Q Spe arN et nXI R Q0 nXI R Q1 nXD R Q0 nXD R Q1 nXD AC K0 nXD AC K1 res et out 35 36 37 38 39 40 41 42 43 44 V CC 35 36 37 38 39 40 41 42 43 44
C6 D5 A5 A4 C5 30 31 32 33 34
30 31 32 33 34
2 Po werGood
PowerGo od D1 V DD _R TC F3 Tmod e0
TXD at a GPI / O0 GPI / O1 GPI / O2 GPI / O3 GPI / O4 GPI / O5 R TC V CC C 64 E1 1 5 pF R 13 5 1M C 65 E2 R TC XI Y3 32. 7 68KH z R TC XO n XI R Q0 n XI R Q1 nXD R Q0 nXD R Q1 n XD AC K0 n XD AC K1 UHD+ UHD-
A3 B4 A2 A1 B3 C3 R 63 3 3 F1 1 G13 F1 0 F1 4 E1 0 F1 2 E1 4 E1 3 R 64 3 3 n XI R Q0 n XI R Q1 n XD R Q0 n XD R Q1 n XD AC K0 n XD AC K1 V CC
GPI O0 GPI O1 GPI O1 GPI O2 GPI O3 GPI O4 GPI O5
1 2 3 4 5 6 7 8 C ON 8 F1 F U SE
V V V V V V D D3 DD3 DD3 D D3 DD3 D D3
1
1
1
1
1
1
USB
J5 1 2 3 4 5 6 C ON 6
V DD3
D0
D1
D2
D3
D4
D5
GPI O0
GPI O1
GPI O2
GPI O3
GPI O4
C 20 . 1F
C 21 . 1F
C ON 34 C 22 . 1 F
1 5 pF
SpearN et
GPI O5
R 62 33 0
XPAddr1/ nSTR OBE XPAddr2 / nAC K XPAddr3 / Bu s y XPAddr4/ PError XPAddr5/ Selec t XPAddr6/ nAut o Fd XPAddr7/ nF ault XPAd dr8/ nI nit XPAd dr9/ Selec t I n XPAdd r10/ PpD at aD ir XPAd dr11 XPAd dr12 XPAd dr13 1 5 pF R 13 1 1M C 63 1 5 pF
D9 C9 A8 E8 D8 C8 E7 D7 B7 C7 A6 B6 D6 17 18 19 20 21 22 23 24 25 26 27 28 29 Y2
17 18 19 20 21 22 23 24 25 26 27 28 29
B1
nR es et Out 25 MHz PC LK
E4 E3
res et out 2 5MH z 1
C1 F2
MC LKO
R XD at a
G10 V D D3 G14 J4
C ON N EC TOR DB9
Rev 1
C 62
P2
Ai11692
V _ C OR E DD
V
_ PLL DD3
V
_I/O DD3
17/22
Typical application
UM0157 - Getting Started with the SpearNet Evaluation Board
2.2
Bill of materials
Table 16.
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Bill of materials
Reference C1, C2, C3, C5, C6, C7, C8, C9, C11, C14, C17, C18, C19, C28, C45, C58, C59, C60 and C61 D1, D2, D3, D4, C4, D5, D6, D7, D8, D9, D10, C10, D14, D15, D16, D17, D18, D19, D20, D21 and D0 C12, C13,C62, C63, C64 and C65 C15 and C16 C20, C21, C22, C40, C41, C42, C43, C44, C46, C47, C48, C49, C50, C51, C52, C53, C54, C55, C50, C51, C52, C53, C54, C55, C56 and C57 C23 C24 C25 C26 C27, C31 and C32 C66 and C67 C77 and C78 D11 and D12 D13 F1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 L1, L2 and L3 L4 STE101P, sh_rst, TCK, MDIX and MDC P2 R1, R2 and R5 R3 R4 and R44 100nF LEDs 15pF 10pF .1F 10F 22nF 220pF 100F 100nF CTS 10F/6.3V (B) 100nF STTH1L06A STPS2L25U Fuse CON14A CON20A CON8 CON6 CON3 (Power Supply) CON3 CON34 CON20 CON3 CON3 CON3 CON3 CON58 30 at 100MHz (Wurth Elektronik) 33H (Wurth Elektronik) CON1 DB9 Connector 49.9K 0 100K Value
Quantity 19 21 6 2 20 1 1 1 1 3 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 3 1 5 1 3 1 2
18/22
Rev 1
UM0157 - Getting Started with the SpearNet Evaluation Board Table 16.
Item 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67
Typical application
Bill of materials (continued)
Reference R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R24, R25, R67, R68, R121, R122, R123 and R124 R38 R39 R40, R83 and R84 R45 R46 R47, R48, R49, R51, R52, R54, R56, R59, R60, R61 and R62 R50, R53, R55, R57 and R58 R63 and R64 10K 12K 3.9K 4.7K 240K 470K 330K 1.8K 33K Value
Quantity 20 1 1 3 1 1 11 5 2 8 8 2 1 1 1 1 1 5 3 1 1 1 1 1 1 1 1 1 1 2 1 1
R104, R113, R114, R115, R116, R117, R118 and R120 2.2K R119, R125, R126, R127, R128, R129, R130 and R132 22K R131 and R135 SW1 SW2 TP-6V TP-1.5V TP-3.3V TP-6V1, TP-6V2, TP-6V3, TP-6V4 and TP-6V5 TP1, TP2 and TP3 U1 U2 U8 U9 U10 U11 U12 U13 U15 U16 Y1 and Y2 Y3 Reset 1M SW DIP-8/SM SW DIP-10 6V 1.5V 3.3V GND TP STE101P SPEAr Net MT48LC8M16 BGA54 ST3232 L5970AD LD1117DT18 LD1117DT33 M29W640FT TFBGA48 TL7700A RJ45 Pulse (J00-0086) 25 MHz 32.768 kHz Button
Rev 1
19/22
Electrical characteristics
UM0157 - Getting Started with the SpearNet Evaluation Board
3
3.1
Electrical characteristics
Absolute maximum ratings
Table 17. Absolute maximum ratings
Parameter Board power supply voltage Board power consumption On-board power supply voltages 12V input voltage 1.8V supply 3.3V supply 5.0V supply 1.62 2.97 4.50 Test Condition Min. 4.4 110 1.98 3.63 5.50 1 Typ. M ax. 35.0 Unit V mA V
1.8V supply On-board power supply output current 3.3V supply 5.0V supply
A
20/22
Rev 1
UM0157 - Getting Started with the SpearNet Evaluation Board
Revision history
4
Revision history
Table 18.
Date 21-Feb-2006
Document revision history
Revision 1 Initial release. Changes
Rev 1
21/22
UM0157 - Getting Started with the SpearNet Evaluation Board
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